Merge branch 'master' into work

to stop at the end of an instance record without properties, leading
to strange errors where netgen declares "There were property errors"
but does not print any errors (because there aren't any).

TO_DO

@@ -1,15 +1,14 @@
 TO_DO list for version 1.5
 ------------------------------
 
- 1) Parallel (transistors and capacitors) and serial (resistors)
-    device merging, plus methods for describing how any device
-    class may be merged.
+ As of version 1.5.70, the major to-do item list is complete.
 
 Possible useful additions (not critical)
 ----------------------
 
  1) Add new output style allowing netlists to be described by Tcl scripts
-    (similar to the C-Code format, but does not require compiling).
+    (similar to the C-Code format, but does not require compiling) (this
+    was done in 1.5.72, but now needs some scripts to make use of it.)
  2) Add automatic file format guessing from file extension for "write" command
  3) Add Tk GUI to match (and improve upon!) the original X11 GUI.
  4) Incorporate into Tcl-based xcircuit
@@ -33,5 +32,7 @@ Possible useful additions (not critical)
     ntk and ext formats, SPICE format writing, and sim format reading).
 11) Add a "property" command to add/remove properties to check, and change
     the slop values (done).
-12) Add a "subcircuit" command to mimic a SPICE ".SUBCKT ... .ENDS" card.
+12) Add a "subcircuit" command to mimic a SPICE ".SUBCKT ... .ENDS" card
+    (i.e., the ability to add subcircuit "stub" definitions from the
+    command line or from a setup file).
 

VERSION

@@ -1 +1 @@
-1.5.72
+1.5.75

base/netcmp.c

@@ -5002,10 +5002,12 @@ PropertyMatch(struct objlist *ob1, struct objlist *ob2, int do_print,
 
    /* Find the first property record of each circuit.  obn1, obn2 are	*/
    /* the last device record before the properties for each device.	*/
-   for (tp1 = ob1; (tp1 != NULL) && tp1->type >= FIRSTPIN; tp1 = tp1->next)
+   for (tp1 = ob1->next; (tp1 != NULL) && tp1->type > FIRSTPIN; tp1 = tp1->next)
       obn1 = tp1;
-   for (tp2 = ob2; (tp2 != NULL) && tp2->type >= FIRSTPIN; tp2 = tp2->next)
+   for (tp2 = ob2->next; (tp2 != NULL) && tp2->type > FIRSTPIN; tp2 = tp2->next)
       obn2 = tp2;
+   if (tp1 && (tp1->type == FIRSTPIN)) tp1 = NULL;	/* tp1 had no properties */
+   if (tp2 && (tp2->type == FIRSTPIN)) tp2 = NULL;	/* tp2 had no properties */
 
    /* Check if there are any properties to match */
 

tcltk/netgen.tcl.in

@@ -84,9 +84,9 @@ proc netgen::convert_to_json {filename lvs_final} {
                nets {
 	          puts $fjson "   \"${key}\": \["
 		  set cktval [lindex $value 0]
-		  puts $fjson "    \"$cktval\","
+		  puts $fjson "    $cktval,"
 		  set cktval [lindex $value 1]
-		  puts $fjson "    \"$cktval\""
+		  puts $fjson "    $cktval"
 		  if {$kidx == $nkeys} {
 		     puts $fjson "   \]"
 		  } else {
@@ -194,15 +194,13 @@ proc netgen::convert_to_json {filename lvs_final} {
 	                   puts $fjson "          \],"
 			}
 		     }
+	             puts $fjson "        \]"
 		     if {$gidx == $glen} {
-	                puts $fjson "        \]"
+	                puts $fjson "      \]"
 		     } else {
-	                puts $fjson "        \],"
+	                puts $fjson "      \],"
 		     }
 		  }
-		  if {$glen > 0} {
-		     puts $fjson "      \]"
-		  }
 		  if {$kidx == $nkeys} {
 		     puts $fjson "   \]"
 		  } else {
@@ -275,15 +273,13 @@ proc netgen::convert_to_json {filename lvs_final} {
 	                   puts $fjson "          \],"
 			}
 		     }
+	             puts $fjson "        \]"
 		     if {$gidx == $glen} {
-	                puts $fjson "        \]"
+	                puts $fjson "      \]"
 		     } else {
-	                puts $fjson "        \],"
+	                puts $fjson "      \],"
 		     }
 		  }
-		  if {$glen > 0} {
-		     puts $fjson "      \]"
-		  }
 		  if {$kidx == $nkeys} {
 		     puts $fjson "   \]"
 		  } else {
@@ -326,9 +322,9 @@ proc netgen::convert_to_json {filename lvs_final} {
 		        puts $fjson "             \[\"${propname}\", \"${propval}\"\],"
 		     }
 		     set property [lindex $instance end]
-		     set prop0 [lindex $property 0]
-		     set propname [lindex $prop0 0]
-		     set propval [lindex $prop0 1]
+		     set prop1 [lindex $property 1]
+		     set propname [lindex $prop1 0]
+		     set propval [lindex $prop1 1]
 		     puts $fjson "             \[\"${propname}\", \"${propval}\"\]"
 	             puts $fjson "           \]"
 	             puts $fjson "         \]"