Merge branch 'master' into work

errors at the end of LVS.  The result of "verify matching" got
overwritten by the result from matching pins, erasing the information
about a cell having property errors.

VERSION

@@ -1 +1 @@
-1.5.52
+1.5.54

base/netgen.c

@@ -1977,9 +1977,14 @@ struct objlist *LinkProperties(char *model, struct keyvalue *topptr)
 
 	    kl = (struct property *)HashLookup(newkv->key, cell->proptab, OBJHASHSIZE);
 	    if (kl == NULL) {
-		Fprintf(stderr, "Warning:  Property %s passed to cell %s which "
-			"does not define a default.\n",
-			newkv->key, cell->name);
+		/* Ideally, for devices, one should check against all	*/
+		/* known standard properties.  That's a pain, so	*/
+		/* instead just assume that the property is correct.	*/
+
+		if (cell->class == CLASS_SUBCKT)
+		    Fprintf(stderr, "Warning:  Property %s passed to cell %s which "
+				"does not define a default.\n",
+				newkv->key, cell->name);
 		kl = NewProperty();
 		kl->key = strsave(newkv->key);
 		kl->idx = 0;

tcltk/netgen.tcl.in

@@ -145,8 +145,8 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out}} {
       if {[verify equivalent]} {
 	 # Resolve automorphisms by pin and property
          netgen::run resolve
-	 set result [verify unique]
-         if {$result == 0} {
+	 set uresult [verify unique]
+         if {$uresult == 0} {
 	    netgen::log put "   Networks match locally but not globally.\n"
 	    netgen::log put "   Probably connections are swapped.\n"
 	    netgen::log put "   Check the end of logfile ${logfile} for implicated nodes.\n"
@@ -169,7 +169,7 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out}} {
 	    }
             netgen::log echo on
 	 }
-	 if {$result == 2} {lappend properr [lindex $endval 0]}
+	 if {$uresult == 2} {lappend properr [lindex $endval 0]}
       } else {
 	 # Flatten the non-matching subcircuit (but not the top-level cells)
          if {[netgen::print queue] != {}} {