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23 Commits
Author SHA1 Message Date
Tim Edwards e94d25b3f1 Merge branch 'master' into netgen-1.5 2024-10-08 02:00:03 -04:00
Tim Edwards d14bf70f1c Working to get some MatchPins improvements from Mitch Bailey from
a long time ago into the code.  The improvements collided with
intervening changes to the same routines and would not merge
cleanly, which is why they were never merged.  Step 1:  Show the
net name of a matching net that is missing a pin.  Remove output
of missing pins that is redundant (pin names being output twice).
2024-10-07 11:10:33 -04:00
Tim Edwards e659495ef5 Merge branch 'master' into netgen-1.5 2024-10-04 02:00:03 -04:00
Tim Edwards 5c21000a8b Made a modification to accommodate the situation where a SPICE
instance is matched to a verilog module definition, and the SPICE
instance is read before the verilog definition, forcing a
placeholder cell to be created.  Netgen will now make the
assumption that the verilog ports are in the same order as the
SPICE instance port order.  At the same time, it will output a
warning message that it is making this not-necessarily-warranted
assumption.  If the number of ports don't match or the placeholder
did not come from a SPICE instance, then the placeholder pins are
left alone.
2024-10-03 14:52:42 -04:00
Tim Edwards 2ce3cf8dd9 Merge branch 'master' into netgen-1.5 2024-10-03 02:00:02 -04:00
Tim Edwards 05872ca918 Corrected an apparently long-standing error that is responsible for
some errors failing to list in the output while also being responsible
for a number of non-errors showing up in the output.  This fix may
substantially clean up netgen output.  Also:  Added text to the
output noting that pin matching may be incorrect with respect to
symmetries if the nets have failed to match.
2024-10-02 21:20:27 -04:00
Tim Edwards 05f433f334 Merge branch 'master' into netgen-1.5 2024-10-01 02:00:02 -04:00
Tim Edwards e821381900 Corrected a rather obscure error in which an otherwise unconnected
port-to-port short (formed by "assign" in verilog or zero-valued
resistors in SPICE) does not get checked when counting nodes
before adding a proxy pin to a subcircuit in that cell, causing
the proxy pin to be assigned the same node number and forming an
unintended connection to the port-to-port connecting net.
2024-09-30 22:11:53 -04:00
Tim Edwards 2129073a38 Merge branch 'master' into netgen-1.5 2024-09-28 02:00:02 -04:00
Tim Edwards 8022e1370f Added a few lines to rebuild the node cache after removing devices
such a zero-ohm resistors or zero-volt sources during the pre-match
phase, since the list of nodes gets changed by merging nets across
the removed devices.  Otherwise, the node-name cache gets
corrupted and random LVS errors occur.
2024-09-27 10:08:37 -04:00
Tim Edwards b0d980bb7d Merge branch 'master' into netgen-1.5 2024-08-17 02:00:03 -04:00
Tim Edwards 2b88d79adc Corrected a rare case where a NULL value propagates in the flattening
routine and is not caught until it causes a segfault.
2024-08-16 19:48:36 -04:00
Tim Edwards ab0165b16c Merge branch 'master' into netgen-1.5 2024-05-17 02:00:02 -04:00
Tim Edwards bf4112db07 Corrected two statements that can cause a segfault because a
structure variable is not checked for the condition of being NULL
before attempting to read a component of the structure.  These
conditions imply that something is badly wrong in the netlist but
should not be causing a segfault.
2024-05-16 11:49:56 -04:00
Tim Edwards 5197eb6186 Merge branch 'master' into netgen-1.5 2024-05-15 02:00:01 -04:00
Tim Edwards fcee934580 Corrected the parsing of the "model" command, which was failing to
pass the right cell name to the routine which counts the number of
pins.  Using this in a setup file will prevent netgen from spending
time matching low-level devices.
2024-05-14 15:12:41 -04:00
Tim Edwards 48ed1f7583 Merge branch 'master' into netgen-1.5 2024-05-10 02:00:02 -04:00
Tim Edwards 2d427aef3c Corrected the bad placement of #ifdef TCL_NETGEN . . . #endif around
critical parts of the netcmp.c code, causing issues with the non-Tcl
build (not that anyone should be doing a non-Tcl build).
2024-05-09 14:11:26 -04:00
Tim Edwards e63593c7e2 Merge branch 'master' into netgen-1.5 2024-04-04 02:00:01 -04:00
Tim Edwards fd0c8c87ea Corrected another error in which, for device sorting, "M" was set
to 1 before the loop over devices in "run", resulting in "M"
taking the value of the previous property record if the following
record did not have an "M" value, instead of setting it to 1.
2024-04-03 21:05:08 -04:00
Tim Edwards 3d180f778d Corrected an error that had previously been corrected in
PropertyMatch() but not corrected symmetrically between circuit1
and circuit2;  this left the possibility that "M=1" in one
circuit vs. no "M" entry in the other would still pop up as a
property error, depending on which circuit (layout or schematic)
was listed first.
2024-04-03 11:01:58 -04:00
Tim Edwards 178af5f493 Merge branch 'master' into netgen-1.5 2024-03-05 02:00:02 -05:00
Tim Edwards 035fef5c72 Corrected an issue that prevents "cells list <file>" from reporting
empty cells (this does not solve the problem at hand, but is a part
of it).
2024-03-04 21:26:09 -05:00
7 changed files with 180 additions and 114 deletions
+1 -1
View File
@@ -1 +1 @@
1.5.271
1.5.282
+28 -14
View File
@@ -600,8 +600,10 @@ int flattenInstancesOf(char *name, int fnum, char *instance)
else break;
/* Put the child cell at the start of ChildObjList */
ChildEnd->next = ChildObjList;
ChildObjList = ChildStart;
if (ChildEnd) {
ChildEnd->next = ChildObjList;
ChildObjList = ChildStart;
}
}
/* Put the child cell at the start of ChildObjList */
@@ -1634,7 +1636,7 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
ECompare *ecomp, *ncomp;
ECompList *list0X, *listX0;
int hascontents1, hascontents2;
int match, modified = 0;
int match, modified1 = 0, modified2 = 0;
int not_top;
if (file1 == -1)
@@ -1712,7 +1714,7 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
" makes a better match\n", ecomp->cell1->name,
name1, file1);
flattenInstancesOf(name1, file1, ecomp->cell1->name);
modified++;
modified1++;
}
if (ecomp->cell2 && (ecomp->num2 > 0) &&
(!(ecomp->cell2->flags & CELL_PLACEHOLDER))) {
@@ -1720,7 +1722,7 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
" makes a better match\n", ecomp->cell2->name,
name2, file2);
flattenInstancesOf(name2, file2, ecomp->cell2->name);
modified++;
modified2++;
}
}
@@ -1810,7 +1812,7 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
" makes a better match\n", ecomp->cell2->name,
name2, file2);
flattenInstancesOf(name2, file2, ecomp->cell2->name);
modified++;
modified2++;
}
}
}
@@ -1876,7 +1878,7 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
" makes a better match\n", ecomp->cell1->name,
name1, file1);
flattenInstancesOf(name1, file1, ecomp->cell1->name);
modified++;
modified1++;
}
}
}
@@ -2030,7 +2032,7 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
/* Remove from list */
ecomp->num1--;
modified++;
modified1++;
ob1 = lob;
}
@@ -2168,8 +2170,8 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
}
/* Remove from list */
ecomp->num1--;
modified++;
ecomp->num2--;
modified2++;
ob2 = lob;
}
@@ -2203,7 +2205,7 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
// are no other modifications, as this rule is relaxed compared to other
// rules, and the other rules should be exhaustively applied first.
if ((listX0 != NULL) && (list0X != NULL) && (modified == 0)) {
if ((listX0 != NULL) && (list0X != NULL) && ((modified1 + modified2) == 0)) {
ECompare *ecomp0X, *ecompX0;
ECompList *elist0X, *elistX0;
for (elistX0 = listX0; elistX0; elistX0 = elistX0->next) {
@@ -2235,7 +2237,7 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
flattenInstancesOf(name1, file1, ecompX0->cell1->name);
ecompX0->num1 = 0;
ecomp0X->num1 += ecompX0->num1;
modified++;
modified1++;
break;
}
}
@@ -2261,7 +2263,7 @@ PrematchLists(char *name1, int file1, char *name2, int file2)
flattenInstancesOf(name2, file2, ecomp0X->cell2->name);
ecomp0X->num2 = 0;
ecompX0->num2 += ecomp0X->num2;
modified++;
modified2++;
break;
}
}
@@ -2292,5 +2294,17 @@ done:
FREE(list0X);
list0X = nextptr;
}
return modified;
// If either netlist was modified, rebuild its node cache
if (modified1 > 0) {
FreeNodeNames(tc1);
CacheNodeNames(tc1);
}
if (modified2 > 0) {
FreeNodeNames(tc2);
CacheNodeNames(tc2);
}
return modified1 + modified2;
}
+15 -26
View File
@@ -2706,7 +2706,9 @@ CheckLegalElementPartition(struct ElementClass *head)
found = 0;
for (scan = head; scan != NULL; scan = scan->next) {
if (scan->count == 2) continue;
/* Quick check for matching 1:1 case */
if ((scan->count == 2) && (scan->elements->graph != scan->elements->next->graph))
continue;
C1 = C2 = 0;
for (E = scan->elements; E != NULL; E = E->next) {
if (E->graph == Circuit1->file) C1++;
@@ -2828,7 +2830,9 @@ CheckLegalNodePartition(struct NodeClass *head)
found = 0;
for (scan = head; scan != NULL; scan = scan->next) {
if (scan->count == 2) continue;
/* Quick check for matching 1:1 case */
if ((scan->count == 2) && (scan->nodes->graph != scan->nodes->next->graph))
continue;
C1 = C2 = 0;
for (N = scan->nodes; N != NULL; N = N->next) {
if (N->graph == Circuit1->file) C1++;
@@ -4467,9 +4471,9 @@ void parallel_sort(struct objlist *ob1, struct nlist *tp1, int idx1, int run)
proplist = (propsort *)MALLOC(run * sizeof(propsort));
obp = obn;
mval = 1;
pval = aval = oval = 0.0;
for (i = 0; i < run; i++) {
mval = 1;
has_crit = FALSE;
merge_type = MERGE_NONE;
ca = co = (char)0;
@@ -6211,7 +6215,9 @@ PropertyMatch(struct Element *E1, struct Element *E2,
if (kl1 != NULL)
break; // Property is required
}
else if (vl1->value.ival != 1)
else if ((vl1->type == PROP_INTEGER) && (vl1->value.ival != 1))
break; // Property M != 1 or S != 1 is a mismatch.
else if ((vl1->type == PROP_DOUBLE) && (vl1->value.dval != 1))
break; // Property M != 1 or S != 1 is a mismatch.
}
if (vl1->type != PROP_ENDLIST) {
@@ -7202,8 +7208,6 @@ int EquivalenceClasses(char *name1, int file1, char *name2, int file2, int douni
return 1;
}
#ifdef TCL_NETGEN
/*----------------------------------------------------------------------*/
/* Callback function used by MatchPins */
/*----------------------------------------------------------------------*/
@@ -7360,7 +7364,7 @@ struct nlist *addproxies(struct hashlist *p, void *clientdata)
// Count the largest node number used in the cell
maxnode = -1;
for (ob = ptr->cell; ob; ob = ob->next)
if (ob->type >= FIRSTPIN || ob->type == NODE)
if (ob->type >= FIRSTPIN || ob->type == NODE || ob->type == PORT)
if (ob->node >= maxnode)
maxnode = ob->node + 1;
numnodes = maxnode;
@@ -7625,7 +7629,7 @@ int MatchPins(struct nlist *tc1, struct nlist *tc2, int dolist)
if (ob2->model.port == -1)
snprintf(ostr + left_col_end + 1, left_col_end, "%s **Mismatch**", ob2->name);
else
snprintf(ostr + left_col_end + 1, left_col_end, "(no matching pin)");
snprintf(ostr + left_col_end + 1, left_col_end, "(no matching pin)", ob2->name);
}
nomatch = TRUE;
/* Pins with different names are on different nets,
@@ -7680,7 +7684,7 @@ int MatchPins(struct nlist *tc1, struct nlist *tc2, int dolist)
for (m = 0; m < left_col_end; m++) *(ostr + m) = ' ';
for (m = left_col_end + 1; m < right_col_end; m++) *(ostr + m) = ' ';
snprintf(ostr, 32, "%s", obn->name);
snprintf(ostr + left_col_end + 1, left_col_end, "(no matching pin)");
snprintf(ostr + left_col_end + 1, left_col_end, "(no pin, node is %s)", obp->name);
for (m = 0; m < right_col_end + 1; m++)
if (*(ostr + m) == '\0') *(ostr + m) = ' ';
Fprintf(stdout, ostr);
@@ -8128,23 +8132,6 @@ int MatchPins(struct nlist *tc1, struct nlist *tc2, int dolist)
obn->instance.name = NULL;
obn->node = -1;
/* Note: Has this pin already been accounted for? */
if (Debug == 0) {
if (strcmp(ob1->name, "(no pins)")) {
for (m = 0; m < left_col_end; m++) *(ostr + m) = ' ';
for (m = left_col_end + 1; m < right_col_end; m++) *(ostr + m) = ' ';
snprintf(ostr, left_col_end, "%s", ob1->name);
snprintf(ostr + left_col_end + 1, left_col_end, "(no matching pin)");
for (m = 0; m < right_col_end + 1; m++)
if (*(ostr + m) == '\0') *(ostr + m) = ' ';
Fprintf(stdout, ostr);
}
}
else {
Fprintf(stderr, "No netlist match for cell %s pin %s\n",
tc1->name, ob1->name);
}
if (ob2 == tc2->cell) {
obn->next = ob2;
tc2->cell = obn;
@@ -8410,6 +8397,8 @@ void FlattenCurrent()
}
}
#ifdef TCL_NETGEN
/*------------------------------------------------------*/
/* Handler is only used when netgen is run from a */
/* terminal, not the Tk console. */
+2 -2
View File
@@ -3094,7 +3094,7 @@ void add_balancing_close(struct objlist *ob1, struct objlist *ob2)
for (nob = ob1->next; nob && nob->type != FIRSTPIN; nob = nob->next)
if (nob->type == PROPERTY)
break;
if (nob->type != PROPERTY) return; // shouldn't happen
if (nob == NULL || nob->type != PROPERTY) return; // shouldn't happen
opentags = 0;
for (; nob->next && nob->next->type == PROPERTY; nob = nob->next) {
@@ -3644,7 +3644,7 @@ int CombineSeries(char *model, int file)
nob->type = PROPERTY;
nob->name = strsave("properties");
nob->node = -2; /* Don't report as disconnected node */
nob->model.class = (obp->model.class == NULL) ? NULL :
nob->model.class = (obp == NULL || obp->model.class == NULL) ? NULL :
strsave(obp->model.class);
nob->instance.props = NewPropValue(2);
+75 -68
View File
@@ -224,6 +224,13 @@ int matchnocase(char *st1, char *st2)
char *sp1 = st1;
char *sp2 = st2;
/* In case of a property that does not exist in one netlist, matchnocase()
* may be passed a null value, so return 0 to indicate a non-match.
* *Both* values null will also be treated as a mismatch (debatable
* behavior).
*/
if (!sp1 || !sp2) return 0;
while (*sp1 != '\0' && *sp2 != '\0') {
if (to_lower[*sp1] != to_lower[*sp2]) break;
sp1++;
@@ -596,65 +603,65 @@ int freeprop(struct hashlist *p)
void CellDelete(char *name, int fnum)
{
/* delete all the contents of cell 'name', and remove 'name' from
the cell hash table. NOTE: this procedure does not care or check
if 'name' has been instanced anywhere. It is assumed that if this
is the case, the user will (quickly) define a new cell of that name.
*/
struct objlist *ob, *obnext;
struct nlist *tp;
/* delete all the contents of cell 'name', and remove 'name' from
the cell hash table. NOTE: this procedure does not care or check
if 'name' has been instanced anywhere. It is assumed that if this
is the case, the user will (quickly) define a new cell of that name.
*/
struct objlist *ob, *obnext;
struct nlist *tp;
tp = LookupCellFile(name, fnum);
if (tp == NULL) {
Printf ("No cell '%s' found.\n", name);
return;
}
tp = LookupCellFile(name, fnum);
if (tp == NULL) {
Printf ("No cell '%s' found.\n", name);
return;
}
HashIntDelete(name, fnum, &cell_dict);
/* now make sure that we free all the fields of the nlist struct */
if (tp->name != NULL) FREE(tp->name);
HashKill(&(tp->objdict));
HashKill(&(tp->instdict));
RecurseHashTable(&(tp->propdict), freeprop);
HashKill(&(tp->propdict));
FreeNodeNames(tp);
ob = tp->cell;
while (ob != NULL) {
obnext = ob->next;
FreeObject (ob);
ob = obnext;
}
HashIntDelete(name, fnum, &cell_dict);
/* now make sure that we free all the fields of the nlist struct */
if (tp->name != NULL) FREE(tp->name);
HashKill(&(tp->objdict));
HashKill(&(tp->instdict));
RecurseHashTable(&(tp->propdict), freeprop);
HashKill(&(tp->propdict));
FreeNodeNames(tp);
ob = tp->cell;
while (ob != NULL) {
obnext = ob->next;
FreeObject (ob);
ob = obnext;
}
}
static int PrintCellHashTableElement(struct hashlist *p)
{
struct nlist *ptr;
struct nlist *ptr;
ptr = (struct nlist *)(p->ptr);
if ((TopFile >= 0) && (ptr->file != TopFile)) return 1;
ptr = (struct nlist *)(p->ptr);
if ((TopFile >= 0) && (ptr->file != TopFile)) return 1;
if (ptr->class != CLASS_SUBCKT) {
/* only print primitive cells if Debug is enabled */
if (Debug == 1) Printf("Cell: %s (instanced %d times); Primitive\n",
if ((ptr->class != CLASS_SUBCKT) && (ptr->class != CLASS_MODULE)) {
/* only print primitive cells if Debug is enabled */
if (Debug == 1) Printf("Cell: %s (instanced %d times); Primitive\n",
ptr->name, ptr->number);
else if (Debug == 3) { /* list */
else if (Debug == 3) { /* list */
#ifdef TCL_NETGEN
Tcl_AppendElement(netgeninterp, ptr->name);
Tcl_AppendElement(netgeninterp, ptr->name);
#else
Printf("%s ", ptr->name);
Printf("%s ", ptr->name);
#endif
}
}
else if ((Debug == 2) || (Debug == 3)) { /* list only */
}
}
else if ((Debug == 2) || (Debug == 3)) { /* list only */
#ifdef TCL_NETGEN
Tcl_AppendElement(netgeninterp, ptr->name);
Tcl_AppendElement(netgeninterp, ptr->name);
#else
Printf("%s ", ptr->name);
Printf("%s ", ptr->name);
#endif
}
else
Printf("Cell: %s (instanced %d times)\n",ptr->name,ptr->number);
return(1);
}
else
Printf("Cell: %s (instanced %d times)\n", ptr->name, ptr->number);
return(1);
}
/* Print the contents of the cell hash table. */
@@ -663,65 +670,65 @@ static int PrintCellHashTableElement(struct hashlist *p)
void PrintCellHashTable(int full, int filenum)
{
int total, bins;
int OldDebug;
int total, bins;
int OldDebug;
if ((filenum == -1) && (Circuit1 != NULL) && (Circuit2 != NULL)) {
if ((filenum == -1) && (Circuit1 != NULL) && (Circuit2 != NULL)) {
PrintCellHashTable(full, Circuit1->file);
PrintCellHashTable(full, Circuit2->file);
return;
}
}
TopFile = filenum;
TopFile = filenum;
bins = RecurseHashTable(&cell_dict, CountHashTableBinsUsed);
total = RecurseHashTable(&cell_dict, CountHashTableEntries);
if (full < 2)
Printf("Hash table: %d of %d bins used; %d cells total (%.2f per bin)\n",
bins = RecurseHashTable(&cell_dict, CountHashTableBinsUsed);
total = RecurseHashTable(&cell_dict, CountHashTableEntries);
if (full < 2)
Printf("Hash table: %d of %d bins used; %d cells total (%.2f per bin)\n",
bins, CELLHASHSIZE, total, (bins == 0) ? 0 :
(float)((float)total / (float)bins));
OldDebug = Debug;
Debug = full;
RecurseHashTable(&cell_dict, PrintCellHashTableElement);
Debug = OldDebug;
OldDebug = Debug;
Debug = full;
RecurseHashTable(&cell_dict, PrintCellHashTableElement);
Debug = OldDebug;
#ifndef TCL_NETGEN
if (full >= 2) Printf("\n");
if (full >= 2) Printf("\n");
#endif
}
struct nlist *FirstCell(void)
{
return((struct nlist *)HashFirst(&cell_dict));
return((struct nlist *)HashFirst(&cell_dict));
}
struct nlist *NextCell(void)
{
return((struct nlist *)HashNext(&cell_dict));
return((struct nlist *)HashNext(&cell_dict));
}
static int ClearDumpedElement(struct hashlist *np)
{
struct nlist *p;
struct nlist *p;
p = (struct nlist *)(np->ptr);
p->dumped = 0;
return(1);
p = (struct nlist *)(np->ptr);
p->dumped = 0;
return(1);
}
void ClearDumpedList(void)
{
RecurseHashTable(&cell_dict, ClearDumpedElement);
RecurseHashTable(&cell_dict, ClearDumpedElement);
}
int RecurseCellHashTable(int (*foo)(struct hashlist *np))
{
return RecurseHashTable(&cell_dict, foo);
return RecurseHashTable(&cell_dict, foo);
}
int RecurseCellFileHashTable(int (*foo)(struct hashlist *, int), int value)
{
return RecurseHashTableValue(&cell_dict, foo, value);
return RecurseHashTableValue(&cell_dict, foo, value);
}
/* Yet another version, passing one parameter that is a pointer */
@@ -729,7 +736,7 @@ int RecurseCellFileHashTable(int (*foo)(struct hashlist *, int), int value)
struct nlist *RecurseCellHashTable2(struct nlist *(*foo)(struct hashlist *,
void *), void *pointer)
{
return RecurseHashTablePointer(&cell_dict, foo, pointer);
return RecurseHashTablePointer(&cell_dict, foo, pointer);
}
/************************** WILD-CARD STUFF *******************************/
+55
View File
@@ -1408,6 +1408,9 @@ skip_endmodule:
if (tpsave != NULL) {
struct nlist *tpplace;
char *savename;
int lnum, pnum, ltest;
unsigned char valid;
struct objlist *lobj, *pobj;
/* Handle a placeholder from a verilog file that has been replaced
* by a netlist with pins in a different order. The pins need to
@@ -1418,6 +1421,58 @@ skip_endmodule:
Printf("Verilog placeholder module %s replaced by module definition\n",
tpsave->name);
tpplace = LookupCellFile("_PLACEHOLDER_", filenum);
/* If tpsave was generated from an instance in a SPICE netlist that
* did not have a black-box subcircuit definition, then the pins
* will all be labeled 1, 2, 3, etc. If so, then assume that the
* verilog pins are in order, and rename the placeholder pins.
* If the number of pins does not match, or if the pins are not
* labeled as ascending integers, then leave the cell alone.
* In either case, output a warning message.
*/
/* Get the number of ports in the placeholder */
pnum = 0;
for (pobj = tpplace->cell; pobj; pobj = pobj->next) {
if (pobj->type != PORT) break;
pnum++;
}
/* Get the number of ports in the saved cell and make */
/* sure that it equals the number of ports in the */
/* placeholder, and that all of the ports in the saved */
/* cell are integers in ascending order. */
valid = TRUE;
lnum = 0;
for (lobj = tpsave->cell; lobj; lobj = lobj->next) {
if (lobj->type != PORT) break;
lnum++;
if (sscanf(lobj->name, "%d", &ltest) != 1) break;
if (ltest != lnum) break;
}
if ((lobj != NULL) && (lobj->type == PORT))
valid = FALSE; /* Pins are not integers in ascending order */
if (pnum != lnum) valid = FALSE; /* Different number of pins */
if (valid == TRUE) {
Printf("Replacing pins of placeholder cell %s from cell definition.\n",
tpsave->name);
pobj = tpplace->cell;
for (lobj = tpsave->cell; lobj; lobj = lobj->next) {
if (lobj->type != PORT) break;
if (pobj == NULL) break; /* should not happen */
FREE(lobj->name);
lobj->name = (char *)MALLOC(strlen(pobj->name) + 1);
strcpy(lobj->name, pobj->name);
pobj = pobj->next;
}
}
else {
Printf("Placeholder pins of cell %s are not compatible and"
" will be left unchanged\n", tpsave->name);
}
/* MatchPins is part of netcmp and normally Circuit2 is the
* circuit being matched, so set Circuit2 to the original
* verilog black-box cell, and MatchPins() will force its
+4 -3
View File
@@ -1595,8 +1595,7 @@ _netgen_model(ClientData clientData,
return result;
if (objc == 3) {
model = Tcl_GetString(objv[2]);
nports = NumberOfPorts(model, fnum);
nports = NumberOfPorts(tp->name, fnum);
if (Tcl_GetIndexFromObj(interp, objv[2], (CONST84 char **)modelclasses,
"class", 0, &index) != TCL_OK) {
@@ -2652,8 +2651,10 @@ _netcmp_verify(ClientData clientData,
disable_interrupt();
if (index == EQUIV_IDX || index == UNIQUE_IDX)
Tcl_SetObjResult(interp, Tcl_NewBooleanObj(0));
else
else {
Fprintf(stdout, "Netlists do not match.\n");
Fprintf(stdout, "Port matching may fail to disambiguate symmetries.\n");
}
}
else if (automorphisms == -2) {
if (index == EQUIV_IDX)