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13 Commits
Author SHA1 Message Date
Tim Edwards 9251ce2a48 Merge branch 'master' into netgen-1.5 2021-07-11 03:00:33 -04:00
Tim Edwards 0a0a6bcf63 Modified the handling of missing pins (again) such that netgen
continues to allow missing pins to match unconnected pins, but
*only* on subcircuits below the top level.  This essentially forces
layouts to separate merged pins with metal resistors, although
there should be an option in magic's ext2spice routine that allows
"equiv" statements, when declaring equivalence of two ports, to be
replaced by a zero volt source or zero ohm ideal resistor.
2021-07-10 13:54:14 -04:00
Tim Edwards 72ef2f2637 Corrected the pin matching so that it runs the same loop on unmatched
pins on non-black-boxed circuits as it does not black-boxed circuits,
but specifically looking for pins that are disconnected on both sides,
since those do not appear in the node list and are not otherwise
handled.  Otherwise, disconnected pins will appear to have disappeared
from the first netlist.
2021-07-10 11:25:07 -04:00
Tim Edwards aa82164c08 Merge branch 'master' into netgen-1.5 2021-07-09 03:00:34 -04:00
Tim Edwards 287f5963d1 Corrected an error that crept into the netgen.tcl script that causes
the "failed pin matching" error message to appear for cells mismatching
topology (in which case pin matching is never done).
2021-07-08 08:56:52 -04:00
Tim Edwards fb7876c7a6 Merge branch 'master' into netgen-1.5 2021-07-03 03:00:13 -04:00
Tim Edwards a984ac1a4d Corrected an error in a recent update that handles the case where
a final parallel or series combination needs to be done but there
are still multiple property records.  The multiplier was being
incorrectly applied twice, causing an automatic mismatch in
parameter values.
2021-07-02 10:51:44 -04:00
Tim Edwards e31caa3500 Merge branch 'master' into netgen-1.5 2021-06-26 03:00:10 -04:00
Tim Edwards 738c1f7b37 Corrected an error probably introduced into the code with the handling
of multiple devices during flattening, that will skip over a node
record at the end of a subcircuit call being flattened and therefore
remove it from the netlist.
2021-06-25 13:16:42 -04:00
Tim Edwards c3cf6c3765 Made another correction that prevents netgen from truncating the pin
list that it prints in the side-by-side element mismatch comparison
for an element, when there is no node record associated with the pin
connection.  This makes the output clearer.
2021-06-25 12:35:11 -04:00
Tim Edwards 99dcc20c0a Corrected MatchPins so that it returns an error code of 0 when pins are
swapped, so that if pin names are swapped on the top level, netgen will
report this as a final error message.  Otherwise, the mismatch is only
reported back in the pin list where it is not obvious.
2021-06-25 10:27:24 -04:00
Tim Edwards c1355bee45 Merge branch 'master' into netgen-1.5 2021-06-25 03:00:10 -04:00
Tim Edwards 4bbc496749 Corrected an error in the "run converge" and "run resolve" methods.
The algorithm is to run without exhaustive subdivision until the
last step because this is much faster.  The final iteration must
be run with exhaustive subdivision on, or else it is possible to
have cells with swapped pins matching.  The routines that resolve
automorphisms were setting exhaustive subdivision for the final
iteration.  But simple "run converge" and "run resolve" were not.
2021-06-24 14:53:24 -04:00
5 changed files with 83 additions and 55 deletions
+1 -1
View File
@@ -1 +1 @@
1.5.189
1.5.194
+4 -1
View File
@@ -344,7 +344,10 @@ int flattenInstancesOf(char *name, int fnum, char *instance)
/* Find the end record of the parent cell and save it */
for (ParentEnd = (ParentProps) ? ParentProps : ParentParams;
ParentEnd && ParentEnd->next && ParentEnd->next->type != FIRSTPIN;
ParentEnd && ParentEnd->next &&
/* Stop on a node or the next instance */
((ParentEnd->next->type > FIRSTPIN) ||
(ParentEnd->next->type == PROPERTY));
ParentEnd = ParentEnd->next);
/* Not primitive, so need to flatten this instance */
+72 -51
View File
@@ -620,15 +620,15 @@ struct FormattedList *FormatBadElementFragment(struct Element *E)
for (elems = nodes[i]->node->elementlist; elems != NULL;
elems = elems->next)
count++;
elemlist->flist[k].count = count;
if (*ob->name != *ob->instance.name) // e.g., "port_match_error"
elemlist->flist[k].name = ob->name;
else
elemlist->flist[k].name = ob->name + strlen(ob->instance.name) + 1;
elemlist->flist[k].permute = (char)1;
k++;
}
elemlist->flist[k].count = count;
if (*ob->name != *ob->instance.name) // e.g., "port_match_error"
elemlist->flist[k].name = ob->name;
else
elemlist->flist[k].name = ob->name + strlen(ob->instance.name) + 1;
elemlist->flist[k].permute = (char)1;
k++;
}
else { /* handle multiple permutable pins */
struct objlist *ob2;
@@ -665,13 +665,16 @@ struct FormattedList *FormatBadElementFragment(struct Element *E)
struct ElementList *elems;
count = 0;
if (nodes[j]->node == NULL) continue; // ?
for (elems = nodes[j]->node->elementlist; elems != NULL;
elems = elems->next)
count++;
if (nodes[j]->node == NULL) /* Under what condition is the node NULL? */
count++;
else {
for (elems = nodes[j]->node->elementlist; elems != NULL;
elems = elems->next)
count++;
}
if (count >= maxcount) {
maxcount = count;
maxindex = j;
maxcount = count;
maxindex = j;
}
}
}
@@ -5017,11 +5020,8 @@ int PropertyOptimize(struct objlist *ob, struct nlist *tp, int run, int series,
for (p = 1; p < pcount; p++) {
vl = vlist[p][i];
ctype = clist[p][i];
if (ctype & (MERGE_S_ADD | MERGE_P_ADD)) {
if (vl->type == PROP_INTEGER)
vl->value.ival *= mult;
else if (vl->type == PROP_DOUBLE)
vl->value.dval *= (double)mult;
vlist[0][i]->value.ival = 0; /* set M to 0 */
if (cvl && (cvl->type == PROP_INTEGER))
{
@@ -5039,26 +5039,25 @@ int PropertyOptimize(struct objlist *ob, struct nlist *tp, int run, int series,
else
cvl->value.dval += vl->value.dval;
}
changed += mult;
}
else if (ctype & (MERGE_S_PAR | MERGE_P_PAR)) {
vlist[0][i]->value.ival = 0; /* set M to 0 */
/* To do parallel combination, both types need to
* be double, so recast them if they are integer.
*/
if (vl->type == PROP_INTEGER) {
vl->type = PROP_DOUBLE;
vl->value.dval = (double)(vl->value.ival);
}
if (vl->type == PROP_DOUBLE)
vl->value.dval /= (double)mult;
vlist[0][i]->value.ival = 0; /* set M to 0 */
if (cvl && (cvl->type == PROP_INTEGER)) {
cvl->type = PROP_DOUBLE;
cvl->value.dval = (double)cvl->value.ival;
}
if ((cvl && vl->type == PROP_DOUBLE)) {
if ((cvl && (vl->type == PROP_DOUBLE))) {
cvl->value.dval =
sqrt(cvl->value.dval * cvl->value.dval
+ vl->value.dval * vl->value.dval);
}
changed += mult;
}
}
}
@@ -7225,8 +7224,13 @@ int MatchPins(struct nlist *tc1, struct nlist *tc2, int dolist)
snprintf(ostr, left_col_end, "%s", obn->name);
if ((*matchfunc)(obn->name, obp->name))
snprintf(ostr + left_col_end + 1, left_col_end, "%s", obp->name);
else
else {
snprintf(ostr + left_col_end + 1, left_col_end, "%s **Mismatch**", obp->name);
/* Pins with different names are on different nets,
* so this should trigger an error return code.
*/
result = 0;
}
for (m = 0; m < right_col_end + 1; m++)
if (*(ostr + m) == '\0') *(ostr + m) = ' ';
Fprintf(stdout, ostr);
@@ -7339,35 +7343,44 @@ int MatchPins(struct nlist *tc1, struct nlist *tc2, int dolist)
/* so apply only to black-box (CELL_PLACEHOLDER) entries. */
/* (Semi-hack: Allow "!" global flag) */
if (((tc1->flags & CELL_PLACEHOLDER) && (tc2->flags & CELL_PLACEHOLDER)) ||
(NodeClasses == NULL)) {
ob1 = tc1->cell;
bangptr1 = strrchr(ob1->name, '!');
if (bangptr1 && (*(bangptr1 + 1) == '\0'))
*bangptr1 = '\0';
else bangptr1 = NULL;
ob1 = tc1->cell;
bangptr1 = strrchr(ob1->name, '!');
if (bangptr1 && (*(bangptr1 + 1) == '\0'))
*bangptr1 = '\0';
else bangptr1 = NULL;
for (i = 0; i < numorig; i++) {
if (*(cover + i) == (char)0) {
j = 0;
for (ob2 = tc2->cell; ob2 != NULL; ob2 = ob2->next) {
char *name1, *name2;
for (i = 0; i < numorig; i++) {
if (*(cover + i) == (char)0) {
j = 0;
for (ob2 = tc2->cell; ob2 != NULL; ob2 = ob2->next) {
char *name1, *name2;
if (!IsPort(ob2)) break;
if (!IsPort(ob2)) break;
bangptr2 = strrchr(ob2->name, '!');
if (bangptr2 && (*(bangptr2 + 1) == '\0'))
*bangptr2 = '\0';
else bangptr2 = NULL;
bangptr2 = strrchr(ob2->name, '!');
if (bangptr2 && (*(bangptr2 + 1) == '\0'))
*bangptr2 = '\0';
else bangptr2 = NULL;
name1 = ob1->name;
name2 = ob2->name;
name1 = ob1->name;
name2 = ob2->name;
/* Recognize proxy pins as matching */
if (!strncmp(name1, "proxy", 5)) name1 +=5;
if (!strncmp(name2, "proxy", 5)) name2 +=5;
/* Recognize proxy pins as matching unconnected pins */
if (!strncmp(name1, "proxy", 5) && (ob2->node == -1)) name1 +=5;
if (!strncmp(name2, "proxy", 5) && (ob1->node == -1)) name2 +=5;
if ((*matchfunc)(name1, name2)) {
/* If both sides have unconnected nodes, then pins with */
/* matching names are an automatic match. Otherwise, if */
/* matching black-box entries, then pins are always */
/* matched by name. */
if (((ob1->node == -1) && (ob2->node == -1)) ||
(((tc1->flags & CELL_PLACEHOLDER) &&
(tc2->flags & CELL_PLACEHOLDER)) ||
(NodeClasses == NULL))) {
if ((*matchfunc)(name1, name2)) {
ob2->model.port = i; /* save order */
*(cover + i) = (char)1;
@@ -7394,13 +7407,15 @@ int MatchPins(struct nlist *tc1, struct nlist *tc2, int dolist)
Tcl_NewStringObj(ob2->name, -1));
}
#endif
if (bangptr2) *bangptr2 = '!';
break;
}
if (bangptr2) *bangptr2 = '!';
j++;
}
if (bangptr2) *bangptr2 = '!';
j++;
}
ob1 = ob1->next;
}
ob1 = ob1->next;
if (bangptr1) *bangptr1 = '!';
}
@@ -7452,6 +7467,12 @@ int MatchPins(struct nlist *tc1, struct nlist *tc2, int dolist)
if ((obt == NULL) && (notempty == 1)) {
ob2->node = -2; // Will run this through cleanuppins
needclean2 = 1;
/* On the top level, missing pins are an error, even if */
/* they appear to match unconnected pins on the other side. */
if (CompareQueue == NULL)
result = 0;
#ifdef TCL_NETGEN
if (dolist) {
Tcl_ListObjAppendElement(netgeninterp, plist1,
+2 -2
View File
@@ -532,7 +532,7 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
}
set properr {}
set matcherr {}
set pinsgood 0
set pinsgood -1
while {$endval != {}} {
if {$dolist == 1} {
netgen::run -list converge
@@ -585,7 +585,7 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
netgen::log echo on
}
}
} else {
} elseif {$uresult > 0} {
# Match pins
netgen::log echo off
if {$dolist == 1} {
+4
View File
@@ -2428,6 +2428,8 @@ _netcmp_run(ClientData clientData,
else {
enable_interrupt();
while (!Iterate() && !InterruptPending);
ExhaustiveSubdivision = 1;
while (!Iterate() && !InterruptPending);
if (dolist) {
result = _netcmp_verify(clientData, interp, 2, objv - 1);
}
@@ -2446,6 +2448,8 @@ _netcmp_run(ClientData clientData,
else {
enable_interrupt();
while (!Iterate() && !InterruptPending);
ExhaustiveSubdivision = 1;
while (!Iterate() && !InterruptPending);
automorphisms = VerifyMatching();
if (automorphisms == -1)
Fprintf(stdout, "Netlists do not match.\n");