expression in a property that was not necessarily a parameter,
and if it wasn't, then netgen would crash. Surfaced by an
example using complicated parameters that netgen was apparently
unable to handle (an issue for another day; the main goal here
was to avoid a segmentation violation).
structure variable is not checked for the condition of being NULL
before attempting to read a component of the structure. These
conditions imply that something is badly wrong in the netlist but
should not be causing a segfault.
incorrectly evaluated; "(w+l)" for example treats "w+l" as
a single string instead of three tokens. Corrected the code
to watch for a failure of strtod() when parsing the expression
at the "+" sign (also for "-").
the parallel sorting routine. This fixes occasional property
errors with series-connected devices such as resistors. (2) Added
a method to associate properties with specific pins when pins are
permutable. This allows netgen to properly check a value like
source/drain area when the definition of source and drain has
changed due to permutation of the device. (3) Added a "property"
command extension "associate" to associate a property with a pin,
for use with the method described in (2).
parallel devices are prepended rather than appended, which avoids
having to search for the end of what may be a rapidly increasing
linked list of properties. This reduces the amount of time spent
in the parallel combination code. Thanks to Anton Blanchard for
pointing out this inefficiency.
Changed line breaks in log and stdout to better differentiate subcircuits.
Added merged series device counts and differentiated from parallel merged device counts.
Added file number to disconnected net, merged count messages.
Changed black box errors to show file numbers instead of hard coded values.
Final error cell list changed from all on one line to one per line.
Removed redundant display in black box warning.
run to the end of the list of circuit elements. Also corrected
another issue caused by the flag to denote multiple no-connect pins,
which can be on an instance pin and so cannot share the data from the
instance record.
device with one or more no-connect pins. The flag that indicates a
no-connect pin was checked incorrectly, potentially causing obscure
and misleading property mismatch messages to be generated.
no pins at all. This overrides the default behavior of treating
empty cells as "black-box" entries, and avoids attempts to compare
cells like logo artwork.
class during setup, for the purpose of generating some derived
value that is used for merging and sorting, such as area = l*w.
Note that this likely needs adjusting so that the expression is
evaluated but not replaced for the purpose of sorting, since the
values to the parameter may change after parallel and series
merging.
"similar no connect" pins so that it is not done on top-level
netlists. This is mainly to deal with the problem where connections
that would normally be pins (but may have, for example, been
connected to a voltage source in a schematic that was deleted because
it was not a netlistable device) are treated as no-connects.
The parallel combination of devices with similar no-connects can then
differ between netlists that differ in describing transistors as
fingered vs. individual devices. This is an obscure case, but the
output of netgen then becomes not only wrong but difficult to
understand what happened, so it is better to avoid.
can be turned on or off from the setup using "property parallel open"
to allow parallelizing devices with no-connect pins vs. "property
parallel connected" to only allow parallelizing of devices with all
pins connected.
devices in parallel with unconnected pins would be confused with
N devices in parallel with those pins all tied together. This is
treated as a property error.
parallel if the same pins are no-connects. These were previously not
treated as parallel because each no-connect has a unique node number,
and cells were only considered as parallel if all pins connected to
the same node numbers. This avoids issues with long-running symmetry
breaking on standard cell designs due to cells like antenna taps or
any cell that is placed without connecting it up. To do: This
makes indistinguishable certain cases, e.g., N cells in circuit 1
with pin X open vs. N cells in circuit 2 with pin X all tied together.
This could be caught during property matching.
was running through the entire object linked list to find the
predecessor of a record that it had already found. Solved by simply
keeping track of the predecessor record.
the possibility that a device (e.g., resistor or capacitor) may
not be a semiconductor device (in other words, a parasitic or
ideal device), and therefore uses "value" but not width and
length, and therefore "value" is a critical property to merge
both in series and parallel. Corrected the series/parallel
network optimization to prevent it from setting both M and S
records > 1 on the same device (which is ambiguous). To try
to get number of devices to match, where there are both series
and parallel devices, they will be merged across the critical
property early (before property matching).
some problems stemming from comparing a case-sensitive netlist
against a case-insensitive one. Verilog netlist reading does
not yet have support for macros other than "`include", and it
does not yet have support for bit vectors constructed with
braces ({}).
time warnings and errors. Removed the "-lazy" option from the
Tcl load command, which is not needed when the stubs libraries
are compiled in correctly, and which causes issues on some
systems (e.g., Mac OS). Thanks to Matt Guthaus for the patch.
misses a device if it has been already moved due to earlier
merging in the serial combine routine, and runs off the end of
the list; the other if the pin check routine falls on the last
device in the list, leading to an incorrect check for a record
where there is only a NULL.
the serial combination routine was disabled so as not to post a
non-working version, since the parallel/serial property networks
are not analyzed. This should be completed soon.
making any subcircuit serializable by using the new command option
"property (device) serial|parallel enable|disable". Note that as
of this commit, serial device detection is enabled but serial
networks are not collapsed for matching, which will tend to lead
to property errors in serial devices until this code is added,
which should be in a day or two.
as failing on certain compilers. This undoubtedly reflects some
change in gcc or the OS setup, but since modern compilers should
be able to figure out for themselves when to inline a subroutine
(or not), the inline hint is somewhat arcane and unnecessary.
'ignore class', but removes instances of the specified class whose
pins are shorted together. Currently requires that all pins must
be shorted together.
include calculations of effective width due to the addition of
width of multiple device instances in parallel. The original
behavior of splitting all "M=" devices into individual instances
has been effectively inverted, instead combining all parallel
devices of the same class into one, with multiple property
records for devices with non-matching properties (e.g., width,
length, etc.). Property matching combines devices with different
"critical properties" (e.g., FET gate width) if these are defined
in the setup using the "property merge" command.
Not yet done: Matching of multiple property records when
critial properties are not defined, handling of critical properties
that combine in parallel instead of simple addition, handling of
devices that combine in series, and the combination of non-critical
properties (e.g., source and drain area, although these are usually
removed from matching).
based on properties that can be traded with number of devices,
such as MOSFET width, by merging. This initial implementation
is somewhat limited, only dealing with properties that merge
by summing. Only devices that do not match at all in the other
circuit will be considered for merging. The feature includes
a command option "property ... merge ..." that allows control
over which devices can and cannot be merged.
variables to iterate over hash table contents. This led to the
inability to nest hash table iterators. Fixed by defining a
wrapper structure that holds the actual hash table plus the size
and iterator indexes. Not only does this solve the nesting
problem, but it also avoids the need to pass the hash table size
on every call, and that reduces the number of ways a hash table
subroutine can go wrong (e.g., cannot access the table out of
bounds simply by passing a size that is larger than was used to
initialize the table).
R. Timothy Edwards
D. Mitch Bailey