the default before comparing instances against each other for
serial/parallel combination. In particular, this avoids a
failure to serially combine a device with M = 1 vs. a device with
no M declared.
Netgen was incorrectly treating mismatched networks as a missing
set of parameters on whichever device had more property records,
resulting in misleading output.
attempt to resolve values by combining over serial chains was
attempting to access a property "S" in the component's master
record, which generally won't exist unless it has been explicitly
set in the netlist (which is unlikely since "S" is not a standard
SPICE/CDL parameter like "M").
misses a device if it has been already moved due to earlier
merging in the serial combine routine, and runs off the end of
the list; the other if the pin check routine falls on the last
device in the list, leading to an incorrect check for a record
where there is only a NULL.
unordered at the time of reaching reorderpins(). Pins will be
ordered arbitrarily (in the order of appearance in the linked
list), but netgen will not crash.
for subcircuits (.subckt ... .ends pair with cellname and pin names
and pin order, but no contents) are automatically treated as black-
box circuits if found and if the "-blackbox" option is passed to the
"lvs" (scripted) command. The "equate pins" command can be used
outside of a comparison to force two circuits (black-box or
otherwise) to be matched by pin name (if not a black-box circuit,
then this is a provisional name match, as a circuit comparison will
order based on connectivity first, not pin names). So two sets of
black-box circuit libraries can be used as long as their pin names
match. One hack added to ignore the "!" at the end of global names
when comparing pin names for matching. Otherwise, pin names must
compare by case-insensitive string match.
documentation, and behaves as intended, which is that "-all" is
not a standalone option but is itself an optional qualifier to
the "cells <valid_cellname>" command. So the options are
"cells <valid_cellname>" and "cells -all <valid_cellname>".
treat empty subcircuits as blackbox cells automatically without
requiring specific callse to "model <cell> blackbox" for each.
Enabled in LVS script by giving option "-blackbox" at the end
of the LVS command.
about property errors to show up, not due to property errors, but
due to proxy pins being inserted in the middle of a device record.
However, the first one was fixed for the case of proxy pins being
added to circuit 1, but the same fix was not made for the opposite
case of proxy pins being added to circuit 2. This commit corrects
that omission.
Tim Edwards
Tim Edwards