Merge branch 'master' into netgen-1.5
This commit is contained in:
commit
cdd768addc
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@ -6892,11 +6892,6 @@ int reorderpins(struct hashlist *p, int file)
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"Ordering will be arbitrary.\n", tc2->name);
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"Ordering will be arbitrary.\n", tc2->name);
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for (ob = ptr->cell; ob != NULL; ) {
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for (ob = ptr->cell; ob != NULL; ) {
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/* Catch badness */
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if (ob->next && (ob->next->node > 100000)) {
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Fprintf(stdout, "Bad.\n");
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}
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if (ob->type == FIRSTPIN) {
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if (ob->type == FIRSTPIN) {
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if ((*matchfunc)(ob->model.class, tc2->name)) {
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if ((*matchfunc)(ob->model.class, tc2->name)) {
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char *sptr = ob->instance.name;
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char *sptr = ob->instance.name;
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@ -562,11 +562,11 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
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if {[netgen::print queue] != {}} {
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if {[netgen::print queue] != {}} {
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if {([lsearch $noflat [lindex $endval 0]] == -1) &&
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if {([lsearch $noflat [lindex $endval 0]] == -1) &&
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([lsearch $noflat [lindex $endval 1]] == -1)} {
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([lsearch $noflat [lindex $endval 1]] == -1)} {
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netgen::log put " Flattening non-matched subcircuits $endval"
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netgen::log put " Flattening non-matched subcircuits $endval\n"
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netgen::flatten class "[lindex $endval 0] $fnum1"
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netgen::flatten class "[lindex $endval 0] $fnum1"
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netgen::flatten class "[lindex $endval 1] $fnum2"
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netgen::flatten class "[lindex $endval 1] $fnum2"
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} else {
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} else {
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netgen::log put " Continuing with black-boxed subcircuits $endval"
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netgen::log put " Continuing with black-boxed subcircuits $endval\n"
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lappend matcherr [lindex $endval 0]
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lappend matcherr [lindex $endval 0]
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# Match pins
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# Match pins
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netgen::log echo off
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netgen::log echo off
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@ -611,13 +611,13 @@ proc netgen::lvs { name1 name2 {setupfile setup.tcl} {logfile comp.out} args} {
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if {[netgen::print queue] != {}} {
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if {[netgen::print queue] != {}} {
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if {([lsearch $noflat [lindex $endval 1]] == -1) &&
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if {([lsearch $noflat [lindex $endval 1]] == -1) &&
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([lsearch $noflat [lindex $endval 1]] == -1)} {
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([lsearch $noflat [lindex $endval 1]] == -1)} {
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netgen::log put " Flattening non-matched subcircuits $endval"
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netgen::log put " Flattening non-matched subcircuits $endval\n"
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netgen::flatten class "[lindex $endval 0] $fnum1"
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netgen::flatten class "[lindex $endval 0] $fnum1"
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netgen::flatten class "[lindex $endval 1] $fnum2"
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netgen::flatten class "[lindex $endval 1] $fnum2"
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} else {
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} else {
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netgen::log put " Continuing with black-boxed subcircuits $endval"
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netgen::log put " Continuing with black-boxed subcircuits $endval\n"
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lappend matcherr [lindex $endval 0]
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lappend matcherr [lindex $endval 0]
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netgen::log put " Continuing with black-boxed subcircuits $endval"
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netgen::log put " Continuing with black-boxed subcircuits $endval\n"
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lappend matcherr [lindex $endval 0]
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lappend matcherr [lindex $endval 0]
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# Match pins
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# Match pins
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netgen::log echo off
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netgen::log echo off
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