Fischer Moseley 7dec6f513f examples: make verilog/amaranth versions of uart_logic_analyzer match		2024-10-07 20:51:03 -07:00
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amaranth	meta: sort imports with ruff	2024-10-07 20:51:03 -07:00
verilog	examples: make verilog/amaranth versions of uart_logic_analyzer match	2024-10-07 20:51:03 -07:00