manta/examples/verilog/icestick
Fischer Moseley 7f36072e90 logic_analyzer: only set triggers if extra info provided in config 2024-10-07 20:51:03 -07:00
..
uart_io_core meta: sort imports with ruff 2024-10-07 20:51:03 -07:00
uart_logic_analyzer logic_analyzer: only set triggers if extra info provided in config 2024-10-07 20:51:03 -07:00