Fischer Moseley 4b9d941bc5 fix API call that doesn't exist anymore, thanks Joe :)		2023-09-02 11:39:16 -04:00
..
block_mem_core	remove mention of wdata/rdata	2023-09-02 11:39:16 -04:00
ether_iface	remove mention of wdata/rdata	2023-09-02 11:39:16 -04:00
io_core	fix API call that doesn't exist anymore, thanks Joe :)	2023-09-02 11:39:16 -04:00
la_core	remove mention of wdata/rdata	2023-09-02 11:39:16 -04:00
uart_iface	update template naming for consistency	2023-09-02 11:39:16 -04:00
__init__.py	remove lut_mem, clean up examples	2023-09-02 11:39:16 -04:00
__main__.py	add linting to makefile, update bus testbenches	2023-03-14 16:24:56 -04:00
hdl_utils.py	enforce consistent naming of lut_mem module	2023-04-28 14:57:36 -04:00
manta_def_tmpl.v	add working ethernet verilog autogeneration woot woot :)	2023-04-28 14:57:36 -04:00