add api generation tests
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@ -22,7 +22,7 @@
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- Write out what bus transactions look like and how messages get passed. probably going to need wavedrom for this.
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## Testing
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- need to add tests for the python itself - does it recognize bad yaml files and produce the right errors when trying to build from them? are good manta files synthesizeable?
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- need to build out more tests for the python itself in test/api_gen
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- try doing literally anything on Windows lol
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## Meta
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@ -54,15 +54,14 @@ class UARTInterface:
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if (port.vid == 0x403) and (port.pid == 0x6010):
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recognized_devices.append(port)
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assert len(recognized_devices) == 2, f"Expected to see two serial ports for FT2232 device, but instead see {len(recognized_devices)}."
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# board manufacturers seem to always make the 0th serial
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# interface on the FT2232 be for programming over JTAG,
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# and then the 1st to be for UART. as a result, we always
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# grab the device with the larger location
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rd = recognized_devices
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assert len(recognized_devices) == 2, f"Expected to see two serial ports for FT2232 device, but instead see {len(recognized_devices)}."
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assert rd[0].serial_number == rd[1].serial_number, "Serial numbers should be the same on both FT2232 ports - probably somehow grabbed ports on two different devices."
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return rd[0].device if rd[0].location > rd[1].location else rd[1].device
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def read_register(self, addr):
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@ -936,8 +935,15 @@ Supported commands:
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elif argv[1] == "ports":
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import serial.tools.list_ports
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for info in serial.tools.list_ports.comports():
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print(info)
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for port in serial.tools.list_ports.comports():
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print(port)
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print(' -> vid: 0x{:04X}'.format(port.vid))
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print(' -> pid: 0x{:04X}'.format(port.pid))
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print(f" -> ser: {port.serial_number}")
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print(f" -> loc: {port.location}")
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print(f" -> mftr: {port.manufacturer}")
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print(f" -> prod: {port.product}")
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print(f" -> desc: {port.description}\n")
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# generate the specified configuration
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elif argv[1] == "gen":
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@ -0,0 +1,26 @@
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---
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cores:
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my_io_core:
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type: io
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inputs:
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btnu: 1
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btnd: 1
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btnl: Q
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btnr: 1
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btnc: 1
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sw: 16
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outputs:
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led: 16
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led16_b: 1
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led16_g: 1
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led16_r: 1
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led17_b: 1
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led17_g: 1
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led17_r: 1
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uart:
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port: "auto"
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baudrate: 115200
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clock_freq: 100000000
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@ -0,0 +1,26 @@
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---
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cores:
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my_io_core:
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type: io
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inputs:
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btnu: 1
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btnd: 1
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btnl: 1
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btnr: 1
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btnc:
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sw: 16
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outputs:
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led: 16
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led16_b: 1
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led16_g: 1
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led16_r: 1
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led17_b: 1
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led17_g: 1
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led17_r: 1
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uart:
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port: "auto"
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baudrate: 115200
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clock_freq: 100000000
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@ -0,0 +1,26 @@
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---
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cores:
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my_io_core:
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type: io
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inputs:
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btnu: 1
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btnd: 1
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btnl: 1
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btnr: 1
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btnc: randomstringthatsnotaninteger
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sw: 16
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outputs:
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led: 16
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led16_b: 1
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led16_g: 1
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led16_r: 1
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led17_b: 1
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led17_g: 1
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led17_r: 1
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uart:
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port: "auto"
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baudrate: 115200
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clock_freq: 100000000
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@ -1 +1,46 @@
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# try to build manta instances from valid and invalid configuration files
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# try to build manta instances from valid and invalid configuration files
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from os import listdir
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from os.path import isfile
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from manta import Manta
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# Valid Configurations
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print(" ==== Testing valid configurations ====")
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valid_configs_path = 'test/api_gen/valid_configs/'
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for config_file in sorted(listdir(valid_configs_path)):
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caught_exception = None
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try:
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m = Manta(valid_configs_path + config_file)
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except Exception as e:
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caught_exception = e
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if caught_exception is None:
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print(f" -> config file {config_file} raised no exceptions.")
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else:
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raise RuntimeError(f"Configuration {config_file} shouldn't have raised an exception, but raised {caught_exception}")
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print('\n')
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# Invalid Configurations
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print(" ==== Testing invalid configurations ====")
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invalid_configs_path = 'test/api_gen/invalid_configs/'
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for config_file in sorted(listdir(invalid_configs_path)):
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caught_exception = None
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try:
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m = Manta(invalid_configs_path + config_file)
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except Exception as e:
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caught_exception = e
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if caught_exception is not None:
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print(f" -> config file {config_file} raised the following exception: {caught_exception}")
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else:
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raise RuntimeError(f"Configuration {config_file} should have raised an exception, but did not!")
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