examples: fix #37, use proper indexing in Amaranth examples
This commit is contained in:
parent
e11d9a8315
commit
b350aa8566
|
|
@ -29,7 +29,7 @@ class EthernetIOCoreExample(Elaboratable):
|
|||
|
||||
# Autodetect the number of LEDs on the platform
|
||||
resources = platform.resources.keys()
|
||||
self.n_leds = max([i for name, i in resources if name == "led"])
|
||||
self.n_leds = len([name for name, _ in resources if name == "led"])
|
||||
|
||||
# Add IOCore to Manta instance
|
||||
self.leds = Signal(self.n_leds)
|
||||
|
|
|
|||
|
|
@ -22,7 +22,7 @@ class UARTIOCoreExample(Elaboratable):
|
|||
|
||||
# Autodetect the number of LEDs on the platform
|
||||
resources = platform.resources.keys()
|
||||
self.n_leds = max([i for name, i in resources if name == "led"])
|
||||
self.n_leds = len([name for name, _ in resources if name == "led"])
|
||||
|
||||
# Add IOCore to Manta instance
|
||||
self.leds = Signal(self.n_leds)
|
||||
|
|
|
|||
|
|
@ -38,9 +38,9 @@ class UARTLogicAnalyzerExample(Elaboratable):
|
|||
|
||||
counter = Signal(10)
|
||||
m.d.sync += counter.eq(counter + 1)
|
||||
m.d.comb += self.probe0.eq(counter[0])
|
||||
m.d.comb += self.probe1.eq(counter[1:2])
|
||||
m.d.comb += self.probe2.eq(counter[3:5])
|
||||
m.d.comb += self.probe0.eq(counter[0:1])
|
||||
m.d.comb += self.probe1.eq(counter[1:3])
|
||||
m.d.comb += self.probe2.eq(counter[3:6])
|
||||
m.d.comb += self.probe3.eq(counter[6:])
|
||||
|
||||
# Wire UART pins to the Manta instance
|
||||
|
|
|
|||
Loading…
Reference in New Issue