add icestick IO core example

examples/icestick/io_core/.gitignore

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+!top_level.sv

examples/icestick/io_core/build.sh

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+python3 -m manta gen manta.yaml manta.v
+$YOSYS -p 'synth_ice40 -top top_level -json top_level.json' top_level.sv
+$NEXTPNR_ICE40 --hx1k --json top_level.json --pcf top_level.pcf --asc top_level.asc
+$ICEPACK top_level.asc top_level.bin

examples/icestick/io_core/manta.yaml

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+---
+cores:
+  my_io_core:
+    type: io
+
+    outputs:
+      LED0: 1
+      LED1: 1
+      LED2: 1
+      LED3: 1
+      LED4: 1
+
+uart:
+  port: "/dev/ttyUSB3"
+  baudrate: 115200
+  clock_freq: 12000000

examples/icestick/io_core/run_io_core.py

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+from manta import Manta
+from time import sleep
+
+manta = Manta('manta.yaml')
+
+i = 0
+while True:
+    # Turn each LED off
+    for j in range(5):
+        manta.my_io_core.set_probe(f"LED{j}", 0)
+
+    # Turn one LED back on
+    manta.my_io_core.set_probe(f"LED{i}", 1)
+
+    i = (i+1) % 5
+    sleep(0.1)

examples/icestick/io_core/top_level.pcf

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+# Generic iCEstick placement constraints file
+
+# Red LEDs
+set_io LED0 99
+set_io LED1 98
+set_io LED2 97
+set_io LED3 96
+
+# Green LED
+set_io LED4 95
+
+# IrDA port
+#set_io RXD 106
+#set_io TXD 105
+#set_io SD 107
+
+# Pmod connector
+#set_io PIO1_02 78 # Pin 1
+#set_io PIO1_03 79 # Pin 2
+#set_io PIO1_04 80 # Pin 3
+#set_io PIO1_05 81 # Pin 4
+#set_io PIO1_06 87 # Pin 7
+#set_io PIO1_07 88 # Pin 8
+#set_io PIO1_08 90 # Pin 9
+#set_io PIO1_09 91 # Pin 10
+
+# Connector J1
+#set_io PIO0_02 112 # Pin 3
+#set_io PIO0_03 113 # Pin 4
+#set_io PIO0_04 114 # Pin 5
+#set_io PIO0_05 115 # Pin 6
+#set_io PIO0_06 116 # Pin 7
+#set_io PIO0_07 117 # Pin 8
+#set_io PIO0_08 118 # Pin 9
+#set_io PIO0_09 119 # Pin 10
+
+# Connector J3
+#set_io PIO2_17 62 # Pin 3
+#set_io PIO2_16 61 # Pin 4
+#set_io PIO2_15 60 # Pin 5
+#set_io PIO2_14 56 # Pin 6
+#set_io PIO2_13 48 # Pin 7
+#set_io PIO2_12 47 # Pin 8
+#set_io PIO2_11 45 # Pin 9
+#set_io PIO2_10 44 # Pin 10
+
+# FTDI Port B UART
+#set_io DCDn 1
+#set_io DSRn 2
+#set_io DTRn 3
+#set_io CTSn 4
+#set_io RTSn 7
+set_io rs232_tx_ttl 8
+set_io rs232_rx_ttl 9
+
+# SPI
+#set_io SPI_SCK 70
+#set_io SPI_SI 68
+#set_io SPI_SO 67
+#set_io SPI_SS_B 71
+
+# Configuration pins
+#set_io CDONE 65
+#set_io CRESET_B 66
+
+# 12 MHz clock
+set_io clk 21

examples/icestick/io_core/top_level.sv

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+`default_nettype none
+`timescale 1ns / 1ps
+
+`include "manta.v"
+
+module top_level (
+	input wire clk,
+
+    output logic LED0,
+    output logic LED1,
+    output logic LED2,
+    output logic LED3,
+    output logic LED4,
+
+	input wire rs232_rx_ttl,
+	output logic rs232_tx_ttl
+	);
+
+    manta manta_inst (
+        .clk(clk),
+        .rst(0),
+
+        .rx(rs232_rx_ttl),
+        .tx(rs232_tx_ttl),
+
+        .LED0(LED0),
+        .LED1(LED1),
+        .LED2(LED2),
+        .LED3(LED3),
+        .LED4(LED4));
+endmodule
+
+`default_nettype wire