code from extflat from type unsigned long to type TileTypeBitMask.
This increases the number of types of each to 256 and tracks the
number of types, so it should be difficult to exceed this amount.
SPICE netlist output that appears to have come from flags created
for writing DEF that inappropriately got set during ext2spice.
A redundant call to efAddNodes() was adding confusion by appearing
to handle most cases but actually missing some. With the corrected
flag, the redundant call is really redundant and can be removed.
It has not been tested whether DEF output is affected by the change
(DEF output from magic is rarely used, anyway).
area and perimeter across devices. The distributed allocation
was missing for hierarchical output, and the function that
accumulates values per resistance class was initializing by
iterating over device classes, not resistance classes, leading
to a segfault if the number of device classes is larger than the
number of resistance classes.
that have been removed by flattening into the parent cell due to lack
of devices. Previously the checks on writing the subcircuit and writing
the call were slightly different, leading to instances in which the
subcircuit call would be written to the netlist output without the
subcircuit being defined. (2) Corrected an error in the "bridge" CIF/GDS
output operator. In certain (somewhat rare) geometries, the tile behind
(instead of in front of) the corner being checked may be incorrectly
flagged as a DRC spacing error. The fix is to ignore tiles that are
behind the corner being checked.
could have multiple ports of the same name. This problem had been
worked over before, but there was an indpendent mechanism producing
the same result for a completely different reason, caused by subcells
being much larger than the cookie-cutter extraction method's extraction
regions. Solved by tracking port names in a hash table and preventing
re-use. (2) ext2spice was producing "no such node" errors; like (1)
this had been previously worked on, and like (1) this mechanism was
independent. Problem came from not passing -1 to extHierSubstrate for
the non-arrayed dimension of a 1-dimensional array. Also: Removed
the word "fatal" from extraction error reporting, as nearly all
extraction errors are entirely benign. This should clear up confusion
among alarmed end-users.
support asymmetric FETs and other devices like bipolars that have
three distinct terminals. This does not go as far as it should to
make the array independent of the number of declared terminals of
the device. However, it suffices to make, e.g., parameter "a2=area"
work for a bipolar device, and to generate the right drain and source
areas and perimeters for asymmetric (e.g., extended-drain) devices.
than one name, because in that case one of the port records ends
up with a null pointer to a node, and causes a crash condition.
This can happen inadvertently, as when a connected node is not
specifically designated a port, but is forced to be a port
because of the connection.
the right argument type (float, not int). Otherwise all resistances
from extresist come out zero when doing "ext2spice extresist on"
and "ext2spice hierarchy on". Also changed the format of the resistance
in the SPICE output to type float, since values are in standard units of
ohms, and rounding to the nearest ohm seems excessively coarse-grained.
I understand the problem, which is that nodes are ordered according
to precedence of EFHNBest() within a circuit, but there is no
concept of ordering between circuits. So ports end up listing nodes
in arbitrary order, and the only way to resolve the order is to use
EFHNBest() as is done within a subcircuit. Appears to work for
different edge cases tested.
ports, to avoid creating ports for node names that are redundant.
It would probably be better to avoid creating the redundant node
names in the first place; however, I am less certain why these
are generated. The incorrect additional ports all have hierarchical
names in the cell, which is a sign that they are incorrect, as the
cell itself should not have any parents. The level of certainty
about this fix is definitely not 100%, but it was tested on a
hierarchical analog design, and setting levels of parasitic caps
caused new nodes to appear in subcircuits and in no cases did
information appear to be lost.
with ext2spice without the hierarchy option. More work needed to
produce correct hierarchical output and to support extraction
devices other than the old "fet" record.
the below-threshold coupling caps being removed from the hierarchy,
added code to suppress the error message when it is clearly related
to a below-threshold cap that has been removed.
used with "ext2spice hierarchy on" because the device index is not
reset between calls to output cells in the hierarchy, leading to
a mismatch of the index for all cells after the first one output.
function was used (HashFind, which never returns NULL, vs.
HashLookOnly, which does) resulting in a failure to solve the
problem which was being patched, which was ext2spice crashing
when cell arrays are present, which itself was due to allowing
brackets in base cell use names.
use name (not part of an array in magic). This was failing in
ext2spice due to code in extflat dealing incorrectly with the
array delimiters. The correction fixes the problem but leaves
the possibility that there could be a conflict between a use
name that is an array and a use name that has the array index
as part of the name.
while reading DEF. To preserve names as much as possible, such
names are now kept. To avoid problems, EFbuild.c and ext2hier
behavior has been changed to only parse entries in a .ext file as
instance arrays if the array notation follows the specific syntax
of [ax:bx:cx][ay:by:cy], letting all other uses of brackets pass
through unaffected.
the compiler. Some are obscure functions (plot verstatec hasn't
been used in years) but others (like SPICE distributed junctions)
are potentially significant sources of unexpected crashes on
systems that don't zero uninitialized memory.
a scaling issue in extract) which was caused by the addition of
hierarchical netlist generation. Finding hierarchical connections
requires finding instances by name, so it is vastly better to create a
hash table of instances instead of a linked list.
name-to-number mapping used for the HSPICE format between
subcircuits. Otherwise, subcircuits with the same instance ID
remain in the table and may cause nodes to be output with a name
that collides with other names in the same subcircuit. This only
affects output in HSPICE format.
added a long time ago, since capacitors use a different method for
calculating width and length than either transistors or resistors,
so subcircuits need a special class designator or else the extraction
may calculate the wrong dimensions for device width by totalling the
perimeter between the device and terminal types, as it would for a
MOSFET.
cause a crash. Corrected the implementation as well as implemented
an option for "subcircuit top auto" that generates a subcircuit
header or not depending on the presence or absense of ports in the
top level cell.
development had been halted since it was first created back in April.
Version 8.2 is now the official development version, with the first
development push to create a Cairo graphics interface.
Tim Edwards
Jan Belohoubek
Dan Moore