Extend the out-of-tree build to the outliers deferred earlier, and
audit install sourcing. All are read-source / write-build now.
Tcl auto-load shared libraries (built via each module's `tcl-main`;
not part of the default TCL build, but now correct when invoked):
* lef/plot/router/ext2spice/ext2sim: the hand-written object rules
(tcllef.o, tclplot.o, tclroute.o, spicewrap.o, spicehier.o, simwrap.o,
ext2sim_main.o) compiled a bare-name source from the cwd; switch to
`-c $< -o $@` so the source is found via VPATH and the object lands in
the build tree. ext2sim_main.o also swaps the hard-coded -I${MAGICDIR}
for ${CPPFLAGS} (build + source include paths). ext2spice spice2sim
install copies $< (source script). Sibling ${MAGICDIR}/<mod>/lib*.o
refs already resolve into the build tree (MAGICDIR = build top).
oa (disabled by default; OpenAccess):
* CXX_INCLUDES -I. -> -I$(srcdir) -I${MAGICDIR} -I${MAGICSRC} so the C++
sources, generated database/database.h, and cross-module headers all
resolve out-of-tree; .deps and objects were already build-local.
doc/latexfiles PostScript regeneration:
* Split PS_SRCDIR (pre-built PS shipped in the source tree, read-only)
from PS_GENDIR (= psfiles in the build tree). `all` / the .tex.ps
rule now regenerate into PS_GENDIR (mkdir -p; latex reads $(srcdir)
via TEXINPUTS; dvips writes the build tree) instead of writing back
into the source psfiles dir. install takes each .ps from PS_GENDIR if
regenerated there, else the pre-built PS_SRCDIR copy.
Verified out-of-tree (make modules; then per-module tcl-main):
* magiclef.so / tclplot.so / tclroute.so / exttospice.so / exttosim.so
all build into the build tree (rc=0); oa.o builds into the build tree;
source tree stays clean.
* install-tcl copies each .so from the build tree.
* Install-location audit on a full `make install DESTDIR=...`: generated
data (scmos.tech, .magicrc, magic.tcl, tclmagic.so) matches the build
tree; verbatim data (glyphs, fonts, magicps.pro, man pages, doc PS)
matches the source tree.
* DESTDIR: two distinct prefixes install 376 files each, independent and
fully contained (nothing written outside DESTDIR).
Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
Also fixed up CC/CXX/CXXFLAGS in the same way.
Main notable concern the tclmagic.so now has reordered position of
$LDFLAGS (was start AND end of list, now start of list only),
$LDDL_FLAGS would have already provided it start of list, so it
would be duplicated set of options.
@LDDL_FLAGS@ no longer prepend $LDFLAGS which is now explicit in the
Makefile to allow specific target control.
The purpose of all this is the toplevel ./configure now has LDFLAGS
control passed down to linker command lines as configure --help
indicates.
"extresist" command continues to work as before. However, the
method now reads from .ext files instead of .sim files, so
generating ".sim" and ".nodes" files is no longer necessary.
In addition, the core code of "extresist" was put directly into
ExtCell.c so that full R-C extraction can be run using
"extract do resistance" followed by "extract all", without
needing to run "extresist" at all other than to set parameters
(e.g., "extresist tolerance 10").
These additional uses of freeMagic() also require defer-by-one using stack
storage (not global storage idiom, recently introduced).
Not sure if they were missed original or new/modified code in the past
12 months. Some areas/line-of-code are not usually compiled, maybe that
is why they were originally missed.
added in a recent commit. The extension was handled by
"ext2spice" but "ext2sim" was missed. Without it, "extresist"
will fail for any circuit containing a device defined in the
tech file extract section with "dsubcircuit".
version 8.3.521 that, due to an argument size mismatch, causes
device parameters in netlist output to be printed as zero.
Also added a small extension to the list of extraction types
to include "device veriloga", which has the same syntax as
"device subcircuit" but generates a component type "N"
(Verilog-A component) in the netlist output.
Not a serious attempt to make these work but they appear to compile
so this helps CI to cover as much code as possible.
ext2sim_main standalone does not link (probably due to unclean cross
module dependencies that now exist due to libutil.a being a heap where
anything with no modular home ends up)
ext2spice/ext2spice.c: Lookup() constify call-site
ext2sim/ext2sim.c: Lookup() constify call-site
windows/windCmdAM.c: Lookup() constify call-site
Tcl_SetResult() uses cast to remove 'const' from type, the pointer
is only used to take a copy of the data, the lack of 'const' is due
to Tcl heritage when supporting C89 era compilers.
TCL9 appears to fix this, in that the macro used ends up at
Tcl_NewStringObj() which has 'const' here.
Due to use of strcasecmp() or similar C API.
Maybe HAVE_STRINGS_H is needed ? If so which platforms needs this ?
clang18 default warning cleanup (strict)
The '&' has higher precedence, so the expression of the '&' side receive
extra parentheses.
ResMakeRes.c:671:37: warning: suggest parentheses around '&&' within '||'
ResMakeRes.c:942:32: warning: suggest parentheses around '&&' within '||'
ResSimple.c:201:70: warning: suggest parentheses around '&&' within '||'
ResRex.c:1036:28: warning: suggest parentheses around '&&' within '||'
ResRex.c:1038:50: warning: suggest parentheses around '&&' within '||'
ext2sim.c:1341:47: warning: suggest parentheses around '&&' within '||'
ext2spice.c:172:44: warning: suggest parentheses around '&&' within '||'
ext2spice.c:173:49: warning: suggest parentheses around '&&' within '||'
ext2spice.c:3655:50: warning: suggest parentheses around '&&' within '||'
ext2hier.c:1412:50: warning: suggest parentheses around '&&' within '||'
gcrDebug.c:638:55: warning: suggest parentheses around '&&' within '||'
selEnum.c:323:28: warning: suggest parentheses around '&&' within '||'
GCC14 -Wall cleanup series [-Wparentheses]
warning messages about ports being electrically connected when
those ports have names that match under rules of case-insensitivity,
and the .ext file is being read for the purpose of generating a
SPICE netlist, which is case-insensitive. Also: Corrected a crash
condition when using "extract path <name>" when directory <name>
does not exist.
and ext2sim to make use of the new esSIvalue() routine, so that
it no longer depends on a preformatted string. Corrected an
issue where the esSIvalue() routine would output "a" for "atto"
which is not supported by ngspice.
2-terminal devices without complaining. The previous handling
seemed to be technically correct other than spitting out warnings
about missing terminals.
isolate the terminal areas of a device (e.g., source and drain)
and calculate their area and perimeter individually for the
device (in addition to the traditional method of calculating
area and perimeter of each resistance class for the entire node).
Also: Reworked the SPICE syntax output to generate SI values
in the range 1-1000 with the appropriate suffix (e.g., "20u")
instead of defaulting to "u" for lengths and "p" for areas.
This prevents it from producing weird units like "150000u" when
a process definition already includes a scalefactor.
Reworked the "extresist" code to use the device terminal area
and perimeter. This fixes an error in which "extresist" would
lose these values and "ext2spice" with option "extresist on"
would generate a new netlist output with zero terminal areas
and perimeters.
redundant (same name, different net). Previously, the method was
to keep the first such node and ignore all others except to add
their resistance and capacitance to the original node. This
prevented routines like "def write" from enumerating all nets
unless they had unique names. The new method keeps the additional
records including the node location where they can be found by
EFNodeVisit(), but flags them with EF_UNIQUE_NODE so that routines
like ext2spice or ext2sim can choose to ignore them. This implies
that this method could be used to reimplement "extract unique"
within "ext2spice" or "ext2sim" without altering label text. This
has not yet been implemented.
This commit makes the code (mostly) C99-compatible, enabling to compile
it without the -Wno-error=implicit-function-declaration flag. This
way, Magic becomes usable on arm64 architectures, specifically on Apple
computers with M1/M2 SoC.
traditionally been kept for backwards compatibility. However, the
operation of "ext2spice" and "ext2sim" as separate programs has
become extremely difficult to maintain, and so it has been dropped
in favor of folding both into the program as commands, as was done
a long time ago in the Tcl/Tk version.
client data generated by ext2spice and attached to a node's
nodeClient record; there is an initNodeClient() routine but no
corresponding freeNodeClient() routine. Eventually had to add a
callback function passed to EFDone() and EFFlatDone() to clean up
these entries. After doing that, valgrind reports clean for all
memory allocated within ext2spice (there are other things that are
not freed but not related to a specific command, so do not need to
be treated as leaks).
(since these are interpreted by IRSIM, the only known program to
parse .sim output)---the "ext2sim alias on" option now just moves
such statements from the ".sim" file to a ".al" file. Corrected the
ResSimMerge() routine to reverse the nodes, so that the devices
belonging to the aliased node are added to the original node, instead
of the other way around. This corrects "missing gate" and "missing SD"
errors that occur due to nodes connected through the substrate.
"ext2sim extresist on", which was being shared; that leads to
confusion, especially when using "ext2sim" to generate a node
name input file for "extresist". Also: Added a warning when two
ports are merged in a .ext file, as this can lead to numerous
incorrect entries in netlist output.
implements a method for handling ports in a subcircuit that have different
port names and indexes but are shorted together. "none" is the default
and backwards-compatible behavior that merges ports together, which will
often cause one of the ports to be optimized out of the netlist. "resistor"
will separate the port names with a 0-ohm ideal resistor. "voltage" will
separate the port names with a 0-volt voltage source. This should work
well for simulation and potentially for LVS, although its impact on LVS
has not been fully investigated.
the last commit, unfortunately. Thanks to Matt Guthaus for alerting me
to this. Also updated parts of the extresist code that remove the
dependence on ResConDCS; this is a minor update and should not affect
the operation of extresist. It is preparatory to doing more work to
support additional device types like capacitors, bipolars, and diodes.
code from extflat from type unsigned long to type TileTypeBitMask.
This increases the number of types of each to 256 and tracks the
number of types, so it should be difficult to exceed this amount.
Darryl L. Miles
R. Timothy Edwards
Alessandro De Laurenzis