the rule is a normal database rule or a CIF-DRC rule. For the latter,
the flag is used when substituting for escape strings in the "why"
rule explanation to produce the correct value in microns.
read". While "lef read" normally annotates existing layout, this
option ensures that no additional cells are created from macros in
the input LEF file. (2) Added a check on the "Input off lambda grid"
warning during CIF/GDS input such that it is not repeated once issued,
as it tends to be output many times when it occurs.
from the layout window. The main reason for this is to keep the
box out of the image when doing "plot svg". The "plot" command was
also modified to always do a plot of the entire cell in the active
layout window if the box is not present.
are considered an exception to the "-toplayer" restriction; this is
because masterslice well/substrate layers will affect the electrical
connectivity between port and sustrate or well.
bounding box of the selection (somewhat unuseful, especially as the
result gets absorbed by the tag callback), and "box select", which
sets the cursor box to the bounding box of the selection (much more
useful). Also corrected the "port" command so that the command
"port make" will search only for non-port labels.
command when annotating an existing layout from a LEF database, if
there is a port in the layout that is shadowed by a label with the
same name that is not a port.
because the opposite type (pwell) is not directly underneath the
gate, but touches it on the plane below. Because the pwell may
be represented by space tiles on the well plane, it was also
necessary to deal with the space type in the bitmask.
type in the device record, which was not updated at the end of
checking terminals for matching device extraction types. so the
boundary survey might see the wrong device type and generate an
incorrect boundary survey as a result.
errors in the periphery of where a change has been made. For some
reason this was not apparent before, but seems to be from a change
dating back to 2008---which seems unlikely. The fact that it has
not been seen before may have something to do with the size of the
DRC halo compared to the DRC step size in the SkyWater PDK, where
it has suddenly become apparent. Jury is still out on this one.
that produces a result that looks like "lef write -hide" in the middle
but "lef write" around the edge. Can be useful for catching all the
detail around the edges but obscuring/simplifying the bulk of the cell
interior.
support asymmetric FETs and other devices like bipolars that have
three distinct terminals. This does not go as far as it should to
make the array independent of the number of declared terminals of
the device. However, it suffices to make, e.g., parameter "a2=area"
work for a bipolar device, and to generate the right drain and source
areas and perimeters for asymmetric (e.g., extended-drain) devices.
device layer type to describe the extraction for both a regular FET
and an extended-drain device. Note that the current code still
requires that the extended-drain device be declared first, and does
not check for this or attempt to reorder if incorrect.
easier to scan through a cell's ports. Used that capability in the
"readspice" script to handle case sensitivity problems, and to find
labels that are not ports and force them to be ports to match the
reference netlist.
Tcl_Alloc() and Tcl_Free() because Tcl_Alloc() uses (unsigned int)
for the argument type and therefore limits memory allocations to
what can fit in 32 bits. Using the system malloc(size_t) should not
cause any issues.
port labels that are unnattached ("attached" to space), or possibly
sticky labels without any geometry underneath, end up with a NULL
node during EFBuild().
to accomodate a method used for processes that require additional
spacing between contacts for large via arrays; this requires
distinguishing between large and small areas to output vias, and
so requires use of "and" and "and-not" before "squares". This
highlights the arbitrary nature of this routine, which probably
works better getting data from cifinput, or not at all (i.e., it is
used when reading LEF, but it is known that the LEF read routines
would be better implemented by running input through CIFGen(). If
that were done, then this problem would not come up).
"msubcircuit" extraction model, which would normally not make any
difference except that when source and/or drain are tagged with
terminal attributes, then the source and drain are swapped with
respect to what is expected in the output SPICE netlist.
caption line in the GUI window, which was causing problems with
long filenames overrunning the string array dedicated to the caption
line. Thanks to Sylvain Munaut for the patch.
forces all ports in a cell to be reordered in alphabetical order,
which ensures that the output of "extract" is always the same
(apart from coupling capacitance, which still ends up in randomized
order due to the use of hashing based on memory address followed
by iterating through the hash table).
at the end of a macro output, even if it is not part of a library.
According to some commercial tools, this is what is expected, even
though the use of "END LIBRARY" is never explained in the LEF/DEF
spec.
Tim Edwards
Jan Belohoubek