Commit Graph

1155 Commits

Author SHA1 Message Date
Tim Edwards ee6834abde Merge branch 'work' into tomerge 2018-11-16 14:04:00 -05:00
Tim Edwards 852dabeee1 Update at Fri Nov 16 14:03:58 EST 2018 by tim 2018-11-16 14:03:58 -05:00
Tim Edwards dd3a92762c Update for writing files from abstract views. Previous behavior was
to prefix all library components read from GDS files pointed to by
an abstract view (other than the cell itself) with a prefix.  But
this does not account for the fact that the same library may be read
by other cells.  The solution is for every cell in the library, check
if there is a cell in magic with the same name which is also an abstract
view that points to the same GDS library.  Those cells do not get
prefixes.  At the same time, however, it was discovered that the GDS
cellname character limit is set at 32, and so prefixes must be kept
short.  To keep the prefixes unique, the prefix was changed to a 4
character random alphanumeric sequence, and a warning is issued if
any GDS cell exceeds the 32 character limit.
2018-11-16 13:59:17 -05:00
Tim Edwards eca3ba25b3 Merge branch 'work' into tomerge 2018-11-15 15:57:58 -05:00
Tim Edwards a2ef591c8d Update at Thu Nov 15 15:57:56 EST 2018 by tim 2018-11-15 15:57:56 -05:00
Tim Edwards 395fb1a8d6 Corrected node merging, which failed to copy the EF_TOP_PORT flag
bit into the merged node.  Corrected reference to efNodeHashTable
to the more proper call to EFHNLook().
2018-11-15 15:55:41 -05:00
Tim Edwards cf9f9784ed Merge branch 'work' into tomerge 2018-11-12 13:27:15 -05:00
Tim Edwards 131ac3156f Update at Mon Nov 12 13:27:12 EST 2018 by tim 2018-11-12 13:27:12 -05:00
Tim Edwards 66603cdb53 Corrected invalid logic in the interpetation of (cif/gds) label
options "text", "port", and "noport" in the techfile.  The
incorrect interpretation was preventing backwards compatibility,
such that ports would not be output on GDS layers if the "port"
option was not used.
2018-11-12 13:25:05 -05:00
Tim Edwards 648b9e54e6 Corrected "ext2spice lvs" to add "global off" as a setting, which
is normal for top level designs (no implicit label connections
should be made at the top level).
2018-10-31 15:41:22 -04:00
Tim Edwards 56e838ebb6 Merge branch 'work' into tomerge 2018-10-31 14:36:02 -04:00
Tim Edwards 27697d36cc Update at Wed Oct 31 14:36:01 EDT 2018 by tim 2018-10-31 14:36:01 -04:00
Tim Edwards 6f8ec21a11 Two improvements: (1) Command extension "ext2spice lvs" sets up
all the settings normally used for LVS (hierarchy on, cthresh
infinite, subcircuit top auto, etc.).  (2) Extract and extract
unique ignore cells marked as abstract views (property LEFview
is set) when checking for unconnected nets with the same name
label.
2018-10-31 14:33:24 -04:00
Tim Edwards fa17436fef Corrected a few errors in the implementation of "csubcircuit",
now fully tested and verified.
2018-10-30 21:56:05 -04:00
Tim Edwards e20319f3c1 Corrected an error in the last commit that causes serious problems
in the SPICE netlist when using new device "csubcircuit" due to
a mismatch in the expected number of parameters.  However, more
work needs to be done to cover capacitor top and bottom plates on
different planes.
2018-10-30 17:17:49 -04:00
Tim Edwards a36b12eadd Merge branch 'work' into tomerge 2018-10-30 16:22:12 -04:00
Tim Edwards 67c69346da Update at Tue Oct 30 16:22:11 EDT 2018 by tim 2018-10-30 16:22:11 -04:00
Tim Edwards 7dc15a7d28 Added extraction device type "csubcircuit", which should have been
added a long time ago, since capacitors use a different method for
calculating width and length than either transistors or resistors,
so subcircuits need a special class designator or else the extraction
may calculate the wrong dimensions for device width by totalling the
perimeter between the device and terminal types, as it would for a
MOSFET.
2018-10-30 16:19:20 -04:00
Tim Edwards 0944b02f5f Merge branch 'work' into tomerge 2018-10-29 17:32:09 -04:00
Tim Edwards e51991b0f1 Update at Mon Oct 29 17:32:07 EDT 2018 by tim 2018-10-29 17:32:07 -04:00
Tim Edwards 79a3934d40 Corrected an error that was previously assumed to be fixed in
8.2.74.  Top-level port names are now flagged independently of
any subcircuit port, so they are easier to identify when determining
naming precedence for the net.  This makes the code cleaner and
removes the problems arising from non-top-level ports and global
names overriding the subcircuit port names.
2018-10-29 17:29:15 -04:00
Tim Edwards a126a3fe74 Merge branch 'work' into tomerge 2018-10-23 08:49:17 -04:00
Tim Edwards 16a0923085 Update at Tue Oct 23 08:49:15 EDT 2018 by tim 2018-10-23 08:49:15 -04:00
Tim Edwards bb0af34441 Corrected an obscure error that causes the background of the layout
window to change after hiding a layer using the toolbar and then
refreshing the layout.  Fixed by saving and restoring the graphics
state around the routine that configures the toolbar image.  Also
added a check to CifPaintCurrent to guard against using an unassigned
ClientData record as a pointer (causes a crash), and added braces
around "expr" values in the Tcl wrapper, which reportedly results in
faster execution of the expression.
2018-10-23 08:44:04 -04:00
Tim Edwards 08e0e9aab4 Merge branch 'work' into tomerge 2018-10-17 10:33:40 -04:00
Tim Edwards 9171bfddf4 Update at Wed Oct 17 10:33:38 EDT 2018 by tim 2018-10-17 10:33:38 -04:00
Tim Edwards 2914286921 Resolved a tricky issue with the crosshair drawing. The crosshair
routine was erasing and redrawing in one step, which ignored the
possibility of having to erase from one window and redraw in
another if the cursor moved focus from one window to another.
This led to crosshairs being improperly drawn and erased when
multiple windows were present, if the windows had different cells
loaded.
2018-10-17 10:30:55 -04:00
Tim Edwards 6f841f1ff8 Merge branch 'work' into tomerge 2018-09-27 08:16:08 -04:00
Tim Edwards 45b6a78245 Update at Thu Sep 27 08:16:05 EDT 2018 by tim 2018-09-27 08:16:05 -04:00
Tim Edwards 7d3cf14cdb Oops, Sept. 25 commit introduced an error that causes exactly what
the patch was attempting to fix.  For node naming, ports were given
precedence over globals.  However, this failed to distinguish between
ports on the top level and ports down in the hierarchy.  This has now
been fixed.  Ports on the hierarchy top level have naming precedence
over everything else;  otherwise, the traditional rules of node
naming precedence apply.
2018-09-27 08:13:31 -04:00
Tim Edwards 7189d84a08 Corrected the routines that determine the "best" name for a node
so that they always give precedence to a port name over a global
name.
2018-09-25 15:18:51 -04:00
Tim Edwards d92a5a8506 Merge branch 'work' into tomerge 2018-09-25 14:21:55 -04:00
Tim Edwards ee2c78e71a Update at Tue Sep 25 14:21:53 EDT 2018 by tim 2018-09-25 14:21:53 -04:00
Tim Edwards ca67c8aedf Added code to EFread to make sure that reading .ext files is
symmetric with writing them.  Since the writing of .ext files
was changed to preferably use the location of the cell being
read, and since the extflat database does not save this path
information, it was necessary to check the main database entry
for each cell to determine if there is a non-default path where
the .ext file may have been saved (with the current working
directory used as a fall-back if the directory is not writeable).
2018-09-25 14:19:30 -04:00
Tim Edwards d594ba8e07 Additional adjustment to ensure that "run length" means the length
shared by the material on both sides.  However, it may require a
clipping method to avoid triggering on shared lengths that are
on an offset.
2018-09-21 15:18:33 -04:00
Tim Edwards 9fc2ee9648 Merge branch 'work' into tomerge 2018-09-21 14:44:29 -04:00
Tim Edwards 504293735a Update at Fri Sep 21 14:44:26 EDT 2018 by tim 2018-09-21 14:44:26 -04:00
Tim Edwards 7b3c4e8777 Refinement of run-length spacing rule analyzes all of the maximum
area rectangles returned by the "maxrect" function and so does
not get triggered simply by the length of the edge being checked.
2018-09-21 14:42:59 -04:00
Tim Edwards 65a4731541 Merge branch 'work' into tomerge 2018-09-19 17:10:45 -04:00
Tim Edwards d8839d5936 Update at Wed Sep 19 17:10:42 EDT 2018 by tim 2018-09-19 17:10:42 -04:00
Tim Edwards 005a4880a3 Modifed the DRC section of the techfile to add two additional
behaviors:  (1) An additional syntax for "widespacing" that allows
both the triggering metal's width AND run-length, which is typical
of rules in 65nm-and-below processes;  and (2) a new "option"
statement for the DRC section, with (for now) one possible flag
"wide-width-noninclusive", indicating that the metal width given
for "widespacing" rules means that a violation is only triggered
for material with a width greater than the given rule width (as
opposed to the default interpretation of a width greater than
or equal to the given rule width).
2018-09-19 17:04:13 -04:00
Tim Edwards f8b79133fb Corrected the "port makeall" command so that it actually works, and
since the edit box was undefined in the code, potentially this
fixes any number of random problems that might be seen with the
"port" command.  Also:  Modified the cell bounding box recalculation
so that it does not continually update a parent cell on every
addition of a child cell but only once for each child cell found.
This greatly reduces the time for GDS file input in the case of
large arrays of cells.
2018-09-13 21:09:38 -04:00
Tim Edwards 7139e0fbb1 Merge branch 'work' into tomerge 2018-09-13 10:21:43 -04:00
Tim Edwards 6cb87ae530 Update at Thu Sep 13 10:21:41 EDT 2018 by tim 2018-09-13 10:21:41 -04:00
Tim Edwards 54e6171e9c Corrected an error that prevents the compile option
"--enable-cairo-offscreen" from working.  Because the option
does not run the full Cario initialization, the grTCairoVisualInfo
is not set, and the first attempt to create a Cairo surface
fails with a segfault.
2018-09-13 10:19:48 -04:00
Tim Edwards fe765bb006 Merge branch 'work' into tomerge 2018-09-09 15:11:49 -04:00
Tim Edwards 1f0d03f3cc Update at Sun Sep 9 15:11:47 EDT 2018 by tim 2018-09-09 15:11:47 -04:00
Tim Edwards 9eb406ffba Implemented an idea from Staf Verhaegen to have "labels" options
"port" and "noport" in the cifoutput section to distinguish
between layer:purpose pairs for port text vs. other kinds of
text.  This allows a closer correspondence between GDS read and
write.  Note that the port writing is currently only in the GDS
write routine, not in the CIF routine.
2018-09-09 15:09:15 -04:00
Tim Edwards b964f9d33a Corrected a number of errors in the last two commits, as well as
additional functionality for ports in GDS format.  This has been
tested with a techfile encoding pin types on a different purpose
than the metal layer drawing purpose.  The label rectangle is
correctly written to the GDS output as geometry on the pin
purpose layer, and the same layer gets read back in from the GDS
file and translated back into the label rectangle.  Port order
is maintained.
2018-08-27 12:23:10 -04:00
Tim Edwards 5c6bc5db34 Extended the code of the previous commit to include attaching
labels to geometry defined using either the "port" or "text"
options of the "label" statement in a cifinput section.
2018-08-27 11:03:05 -04:00