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Added a new device type "dsubcircuit" which basically behaves like 

"csubcircuit" but swaps the first two pins (with the device
identifier layer becoming the 2nd pin and the other terminal the
first), which is needed for n-type diodes modeled as subcircuits
where the subcircuit pin order matches the order of pins for a
SPICE n-type diode component.  Previously "msubcircuit" was used
for this purpose, but will calculate the wrong L and W.  While
use of L and W for diodes is rare, this device type also works for
reversed capacitors (where the bottom or non-identifying layer
terminal is in the first pin position of the subcircuit).
This commit is contained in:
R. Timothy Edwards 2025-10-07 16:45:22 -04:00
parent 656d27b17a
commit d3a0228958
8 changed files with 22 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
ext2spice/ext2hier.c
View File

@ -805,6 +805,7 @@ spcdevHierVisit(
case DEV_SUBCKT:
case DEV_RSUBCKT:
case DEV_CSUBCKT:
case DEV_DSUBCKT:
case DEV_MSUBCKT:
devchar = 'X';
break;
@ -842,6 +843,7 @@ spcdevHierVisit(
case DEV_VERILOGA:
case DEV_RSUBCKT:
case DEV_CSUBCKT:
case DEV_DSUBCKT:
case DEV_MSUBCKT:
fprintf(esSpiceF, "%d", esSbckNum++);
break;
@ -884,6 +886,7 @@ spcdevHierVisit(
break;
case DEV_MSUBCKT:
case DEV_DSUBCKT:
/* msubcircuit is "Xnnn drain gate [source [sub]]]" */
/* to more conveniently handle situations where MOSFETs */
/* are modeled by subcircuits with the same pin ordering. */

5
ext2spice/ext2spice.c
View File

@ -2697,6 +2697,7 @@ spcdevVisit(
case DEV_VERILOGA:
case DEV_RSUBCKT:
case DEV_CSUBCKT:
case DEV_DSUBCKT:
case DEV_MSUBCKT:
break;
case DEV_DIODE:
@ -2794,6 +2795,7 @@ spcdevVisit(
case DEV_SUBCKT:
case DEV_RSUBCKT:
case DEV_CSUBCKT:
case DEV_DSUBCKT:
case DEV_MSUBCKT:
devchar = 'X';
break;
@ -2835,6 +2837,7 @@ spcdevVisit(
case DEV_VERILOGA:
case DEV_RSUBCKT:
case DEV_CSUBCKT:
case DEV_DSUBCKT:
case DEV_MSUBCKT:
fprintf(esSpiceF, "%d", esSbckNum++);
break;
@ -2874,6 +2877,7 @@ spcdevVisit(
break;
case DEV_MSUBCKT:
case DEV_DSUBCKT:
/* MOS-like subcircuit is "Xnnn drain gate [source [sub]]" */
/* to more conveniently handle cases where MOS devices are */
@ -4439,6 +4443,7 @@ parallelDevs(
case DEV_VERILOGA:
case DEV_RSUBCKT:
case DEV_CSUBCKT:
case DEV_DSUBCKT:
break;
case DEV_VOLT:

2
extflat/EFbuild.c
View File

@ -895,6 +895,7 @@ efBuildDevice(
case DEV_MSUBCKT:
case DEV_RSUBCKT:
case DEV_CSUBCKT:
case DEV_DSUBCKT:
argstart = 0;
}
@ -976,6 +977,7 @@ efBuildDevice(
case DEV_CAPREV:
case DEV_RSUBCKT:
case DEV_CSUBCKT:
case DEV_DSUBCKT:
case DEV_MSUBCKT:
case DEV_SUBCKT:
case DEV_VERILOGA:

3
extflat/EFread.c
View File

@ -50,7 +50,7 @@ static char rcsid[] __attribute__ ((unused)) = "$Header: /usr/cvsroot/magic-8.0/
const char * const extDevTable[] = {"fet", "mosfet", "asymmetric", "bjt", "devres",
"devcap", "devcaprev", "vsource", "diode", "pdiode",
"ndiode", "subckt", "rsubckt", "msubckt", "csubckt",
"veriloga", NULL};
"dsubckt", "veriloga", NULL};
#endif
/*
@ -376,6 +376,7 @@ readfile:
case DEV_VERILOGA:
case DEV_MSUBCKT:
case DEV_RSUBCKT:
case DEV_DSUBCKT:
case DEV_CSUBCKT:
ac = 7; /* Actually can have many arguments, which */
break; /* we will deal with in efBuildDevice(). */

1
extflat/EFvisit.c
View File

@ -189,6 +189,7 @@ EFGetLengthAndWidth(dev, lptr, wptr)
case DEV_VERILOGA:
case DEV_MSUBCKT:
case DEV_RSUBCKT:
case DEV_DSUBCKT:
case DEV_CSUBCKT:
case DEV_DIODE:
case DEV_PDIODE:

3
extract/ExtBasic.c
View File

@ -57,7 +57,7 @@ static char sccsid[] = "@(#)ExtBasic.c 4.13 MAGIC (Berkeley) 12/5/85";
#ifdef MAGIC_WRAPPER
const char * const extDevTable[] = {"fet", "mosfet", "asymmetric", "bjt", "devres",
"devcap", "devcaprev", "vsource", "diode", "pdiode", "ndiode",
"subckt", "rsubckt", "msubckt", "csubckt", "veriloga", NULL};
"subckt", "rsubckt", "msubckt", "csubckt", "dsubckt", "veriloga", NULL};
#endif
/* --------------------- Data local to this file ---------------------- */
@ -2719,6 +2719,7 @@ extOutputDevices(def, transList, outFile)
case DEV_DIODE: /* Only handle the optional substrate node */
case DEV_NDIODE:
case DEV_PDIODE:
case DEV_DSUBCKT:
/* Diode length and width are computed like capacitor */
/* length and width. This operation is expensive, so */
/* do this ONLY if length and width are specified as */

6
extract/ExtTech.c
View File

@ -205,7 +205,7 @@ static const keydesc keyTable[] = {
/*
* Table used for parsing the "device" keyword types
*
* (Note: "10" for max types in subcircuit is arbitrary---the parser
* (Note: "11" for max types in subcircuit is arbitrary---the parser
* ignores max types for DEV_SUBCKT, DEV_MSUBCKT, and DEV_VERILOGA).
*/
@ -248,6 +248,9 @@ static const keydesc devTable[] = {
{"csubcircuit", DEV_CSUBCKT, 4, 7,
"name dev-types terminal-types [sub-types|None sub-node] [options]"},
{"dsubcircuit", DEV_DSUBCKT, 4, 7,
"name dev-types terminal-types [sub-types|None sub-node] [options]"},
{"veriloga", DEV_VERILOGA, 3, 11,
"name dev-types [N] [term1-types ... termN-types [sub-types|None sub-node]] [options]"},
@ -2815,6 +2818,7 @@ ExtTechLine(sectionName, argc, argv)
case DEV_RSUBCKT:
case DEV_CSUBCKT:
case DEV_DSUBCKT:
nterm = (dv->k_key == DEV_RSUBCKT) ? 2 : 1;
DBTechNoisyNameMask(argv[4], &termtypes[0]); /* terminals */
TTMaskSetMask(allExtractTypes, &termtypes[0]);

3
extract/extract.h
View File

@ -55,7 +55,8 @@ extern int ExtDoWarn; /* Bitmask of above */
#define DEV_RSUBCKT 12 /* Resistor-like subcircuit. */
#define DEV_MSUBCKT 13 /* MOSFET-like subcircuit. */
#define DEV_CSUBCKT 14 /* Capacitor-like subcircuit. */
#define DEV_VERILOGA 15 /* Verilog-A model ("N" component) */
#define DEV_DSUBCKT 15 /* Diode-like subcircuit. */
#define DEV_VERILOGA 16 /* Verilog-A model ("N" component) */
/* Device names for .ext file output (new in version 7.2) */
/* (defined in extract/ExtBasic.c *and* extflat/EFread.c) */