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Saving work so I can rebase on changes made to the magic extract
code which are relevant and need to be included. Current state is that hierarchical extresist "basically works" but entry and exit points through the hierarchy are not being examined, so results are currently based on port positions and not actual connections. Also, proper distribution of coupling caps has not yet been worked on. Rebased, fixing merge conflict.
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+24
-4
@@ -802,14 +802,34 @@ extOutputNodes(nodeList, outFile)
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lastname = ll->ll_label->lab_text;
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}
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/* Don't print a warning unless both labels are
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* really ports.
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* really ports. Also, don't print a warning for
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* names generated by "extract unique" vs. real
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* pin names or another unique name---"extract
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* unique" does not observe where nets pass through
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* subcircuits, so it tends to over-generated
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* unique names, which "ext2spice" will filter out.
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* For a net to be shorted to itself is not an error.
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* NOTE: Potentially the unique name could be removed
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* here and save ext2spice the trouble.
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*/
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if ((portname != NULL) &&
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(ll->ll_attr == LL_PORTATTR) &&
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(strcmp(ll->ll_label->lab_text, portname)))
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TxError("Warning: Ports \"%s\" and \"%s\" are"
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" electrically shorted.\n",
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text, ll->ll_label->lab_text);
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{
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char *uptr1, *uptr2;
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uptr1 = strstr(text, "_uq");
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uptr2 = strstr(ll->ll_label->lab_text, "_uq");
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if (uptr1) *uptr1 = '\0';
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if (uptr2) *uptr2 = '\0';
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if (strcmp(text, ll->ll_label->lab_text))
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{
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TxError("Warning: Ports \"%s\" and \"%s\" are"
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" electrically shorted.\n",
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text, ll->ll_label->lab_text);
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}
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if (uptr1) *uptr1 = '_';
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if (uptr2) *uptr2 = '_';
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}
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if (!isPort && (ll->ll_attr == LL_PORTATTR))
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portname = ll->ll_label->lab_text;
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}
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