mirror of https://github.com/KLayout/klayout.git
Updated Deep Verification Base (markdown)
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The Deep Verification Base development happens in the "dvb" branch: https://github.com/klayoutmatthias/klayout/tree/dvb
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See more about the progress here: [DVB Log](DVB-Log)
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See more about the progress here: [[DVB Log|DVB-Log]]
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# The problem
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@ -9,7 +9,8 @@ Verification is a fundamental task in the chip design process. KLayout basically
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Two important verification methods are addressed here:
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* Design rule check (DRC)
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* Schematic extraction plus schematic compare. Both steps form layout vs. schematic verification (LVS)
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* Schematic extraction plus schematic compare.
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* Compare: both steps form layout vs. schematic verification (LVS) once a netlist compare feature is added.
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KLayout supports DRC verification to some extent:
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