Files
klayout/testdata/lvs/SP6TArray_2X4.spi
T
Matthias Köfferlein 7d78194cf0 Issue 1021 (#1026) - LVS match issue on SRAM sample
* First step for solution:

Problem was: the ambiguity resolver was making decisions which later resulted in
a name conflict. Later on, another branch of the backtracking algorithm came
across the same situation but decided based on names, creating an conflict.

First part of the solution is to establish the backtracking information
during ambiguity resolution and using that rather than an alternative branch
later on. This avoids this conflict, but does not favor names as mandated
by the "use_names" flag. This will be the second step of the solution.

* Bugfixed solution (partially)

* Introducing third pass in netlist compare

The second pass is "ambiguity resolution by name" and
is skipped if "consider_net_names" is false. The third
pass then is ignoring the names.

* Bugfix

* Comment fixed, test updates

* Added tests

* Added test data variant for CentOS 8
2022-03-15 21:14:32 +01:00

26 lines
1.2 KiB
Plaintext

* SP6TArray_2X4
* SP6TCell
.subckt SP6TCell vdd vss wl bl bl_n
Mpu1 vdd bit_n bit vdd sky130_fd_pr__pfet_01v8__model l=0.15um w=0.42um
Mpu2 bit_n bit vdd vdd sky130_fd_pr__pfet_01v8__model l=0.15um w=0.42um
Mpd1 vss bit_n bit vss sky130_fd_pr__nfet_01v8__model l=0.15um w=0.42um
Mpd2 bit_n bit vss vss sky130_fd_pr__nfet_01v8__model l=0.15um w=0.42um
Mpg1 bl wl bit vss sky130_fd_pr__nfet_01v8__model l=0.15um w=0.42um
Mpg2 bl_n wl bit_n vss sky130_fd_pr__nfet_01v8__model l=0.15um w=0.42um
.ends SP6TCell
* SP6TArray_2X1
.subckt SP6TArray_2X1 vss vdd wl[0] wl[1] bl[0] bl_n[0]
Xinst0x0 vdd vss wl[0] bl[0] bl_n[0] SP6TCell
Xinst1x0 vdd vss wl[1] bl[0] bl_n[0] SP6TCell
.ends SP6TArray_2X1
* SP6TArray_2X2
.subckt SP6TArray_2X2 vss vdd wl[0] wl[1] bl[0] bl_n[0] bl[1] bl_n[1]
Xinst0x0 vss vdd wl[0] wl[1] bl[0] bl_n[0] SP6TArray_2X1
Xinst0x1 vss vdd wl[0] wl[1] bl[1] bl_n[1] SP6TArray_2X1
.ends SP6TArray_2X2
* SP6TArray_2X4
.subckt SP6TArray_2X4 vss vdd wl[0] wl[1] bl[0] bl_n[0] bl[1] bl_n[1] bl[2] bl_n[2] bl[3] bl_n[3]
Xinst0x0 vss vdd wl[0] wl[1] bl[0] bl_n[0] bl[1] bl_n[1] SP6TArray_2X2
Xinst0x1 vss vdd wl[0] wl[1] bl[2] bl_n[2] bl[3] bl_n[3] SP6TArray_2X2
.ends SP6TArray_2X4