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94 Commits

Author SHA1 Message Date
Matthias Koefferlein f6836b96a2 WIP: some enhancements 
Spice writer: don't prefix model name with "M"
Added "device_class_mismatch" message to netlist compare
Assertion if device classes or circuits are nil on
"same_..."
 2019-04-07 10:15:57 +02:00
Matthias Koefferlein 52fb8b0f65 Merge remote-tracking branch 'remotes/origin/master' into dvb 2019-04-04 07:35:43 +02:00
Matthias Koefferlein 89ffd7e3da WIP: Simple SPICE reader. 2019-04-01 22:46:33 +02:00
Matthias Koefferlein 9613ad72c8 WIP: netlist compare - using it for more tests 
Issue solved: some circuit pins may not have a net - these
need to be ignored.

Requirement: all pins with a net must be mapped.

Detached pins are not present in the mapping table.
A dummy mapping table was introduced to allow dropping
of pins in the second circuit too.

Output of compare should not depend on memory location
anymore and pin mismatch reporting should include all
pins.
 2019-03-31 23:59:43 +02:00
Matthias Koefferlein e545d6af3f Refined solution for issue-245 by providing a better name mapping (checked with ngspice) 2019-03-22 00:05:17 +01:00
Matthias Koefferlein 9356f32026 Fixed issue-245 (support Spice netlist with names instead of numbers) 
The option is in the Spice writer (writer.use_net_names=true).
 2019-03-21 23:34:16 +01:00
Matthias Koefferlein ab8107de2d Bugfix: Spice writer needs 'P' suffix for source/drain area of MOS 2019-03-10 01:26:52 +01:00
Matthias Koefferlein 8b29b30ff9 WIP: more consistent text handling 
Texts are not only kept inside original layers, but
also inside deep layers. This enables using texts
from DRC.

However, texts in deep layers are kept as markers.
Mostly they are converted back to texts, but the
orientation will be lost.

The change eliminates the need to using Iterators
in DRC instead of original layers and use of
label layers in deep mode.

A drawback is the presence of marker shapes in
deep mode (unless polygon layers are created).
Also, text output to RDB is not supported from
deep layers currently.
 2019-03-06 00:34:56 +01:00
Matthias Koefferlein bacd565d05 Bugfix: Spice writer added one pin too much to MOS4 transistors. 2019-03-04 17:26:35 +01:00
Matthias Koefferlein 8d3b94201e Antenna check: tests added, 'catchall' diode protection 2019-03-01 23:07:28 +01:00
Matthias Koefferlein 9f4f2d58d7 First version of antenna check. 2019-02-28 23:56:49 +01:00
Matthias Koefferlein d4ed21f42a Just new tests 2019-02-25 22:34:06 +01:00
Matthias Koefferlein 3c6aafcc0c Region: hierarchical text object detection implementated. 2019-02-23 00:56:55 +01:00
Matthias Koefferlein 18f74bac1e Enabled transformations for deep regions/edges/edge pairs - important for handling layouts with different DBUs in DRC 2019-02-22 01:02:48 +01:00
Matthias Koefferlein 91407ddaa9 Added tests for region processors. 2019-02-20 21:40:43 +01:00
Matthias Koefferlein 496b695ef0 Refactoring of the polygon processing in Region 2019-02-19 22:11:55 +01:00
Matthias Koefferlein 9ec6b44c93 Added some tests for the previous commit. 2019-02-18 00:15:26 +01:00
Matthias Koefferlein 311318c578 Ported edge/edge DRC functions to hierarchical mode. 2019-02-17 18:54:33 +01:00
Matthias Koefferlein c40f147dc7 Edge/edge and edge/polygon interaction test ported to hierarchical mode. 2019-02-17 18:36:15 +01:00
Matthias Koefferlein 7ef0451ca8 Partial segments of edges converted to hierarchical operations. 2019-02-17 17:53:21 +01:00
Matthias Koefferlein 74006b6208 Hierarchical implementation of extended method for edges 2019-02-17 17:34:31 +01:00
Matthias Koefferlein ae783a2245 Hiearchical implementation of edge filter. 2019-02-17 16:18:24 +01:00
Matthias Koefferlein 61d766bd4c Hierarchical implementation of edge to region operations. 2019-02-17 16:05:39 +01:00
Matthias Koefferlein e6ee1c064e Hierarchical implementation of edge/edge booleans. 2019-02-17 15:07:16 +01:00
Matthias Koefferlein 8e5bffcf18 Hierarchical angle check. 2019-02-17 11:42:30 +01:00
Matthias Koefferlein a7bfaac424 Cell variant resolution by propagation, grid check now implementation hierarchically (with propagation) 2019-02-17 10:59:04 +01:00
Matthias Koefferlein 6e35e80963 Hierarchical implementation of polygon vs. edge interact 2019-02-15 23:43:45 +01:00
Matthias Koefferlein 78617930dd Hierarchical implementation of self-overlap merge. 2019-02-13 22:41:12 +01:00
Matthias Koefferlein ddcfda8761 Some optimization: keep merged state in deep region. 2019-02-13 17:17:03 +01:00
Matthias Koefferlein 68947bedd2 Updated golden test data. 2019-02-13 01:11:15 +01:00
Matthias Koefferlein b0fc2be96e Deep regions: some more operations implemented hierarchically 
- snap (!) - but only for gx == gy
- filtering
- interact/inside/outside/overlap + not_... variants
- edges
 2019-02-13 01:07:32 +01:00
Matthias Koefferlein 6404ca6b1d WIP: Deep edge pairs 2019-02-12 00:08:47 +01:00
Matthias Koefferlein a81a8cdbc8 Modified edge transformation to maintain the orientation paradigm 
When the transformation is mirroring, edges now swap their
points to maintain the right-is-inside paradigm.
 2019-02-10 16:03:46 +01:00
Matthias Koefferlein 4abc38a5cc Test for deep/flat collaboration 2019-02-10 08:28:48 +01:00
Matthias Koefferlein e8e45b7272 Some tests, smooth and round method of deep region 2019-02-09 23:51:35 +01:00
Matthias Koefferlein 404f0f8328 Added a missing test golden data. 2019-02-09 22:56:44 +01:00
Matthias Koefferlein b6dd149f53 Changed variant suffix to to be consistent with cell name suffix generation in KLayout. 2019-02-09 19:21:14 +01:00
Matthias Koefferlein 1f3af7bbfe Hierarchical area and perimeter and sizing 
Area and perimeter computation happens hierarchically
now. Magnified instances are supported.

Sizing is implemented hierarchically.

For anisotropic sizing, orientation variants may be
generated. For both isotropic and anisotropic
magnification variants will be created.
 2019-02-09 19:13:54 +01:00
Matthias Koefferlein bbf7b2768b WIP: cell variant collecting and building. 2019-02-09 16:29:34 +01:00
Matthias Koefferlein ac7baf96ff Added golden data for deep region regression test. 2019-02-07 21:08:52 +01:00
Matthias Koefferlein decc5ede13 Robustification of Region 
- Tests for merge
- Locking the layout when writing back the data for
  performance improvement
 2019-02-05 23:39:31 +01:00
Matthias Koefferlein 9c0123df20 Implemented implicit joining of nets with the same label. 2019-02-03 21:34:23 +01:00
Matthias Koefferlein 3f1cd226a5 Made net name optional in l2n format. 2019-02-03 13:33:58 +01:00
Matthias Koefferlein f9c33733b9 l2n format writer and reader: more compact output 2019-02-03 01:49:48 +01:00
Matthias Koefferlein 99f111fe01 Attempt to achieve reproducibility between MSVC and gcc 
Applies to dbHierProcessor.cc:

The issue was related to std::unordered_set/map which
(as the name says) is not ordered. The output of the
boolean core computation step is currently dependent
on the order (it's single pass), hence the order of
the contexts matters.

Using ordered sets where possible and explicit
sorting might help.
 2019-02-02 22:43:42 +01:00
Matthias Koefferlein c90f7e4af9 Introduced perimeter parameters for MOS3/MOS4 2019-02-02 01:29:28 +01:00
Matthias Koefferlein 57305977a4 Spice writer delegate fix 
- Changed to const & objects in the Spice writer delegate
  to non-const & for Ruby/Python reimplementation (as const/non-const
  ambiguity is an issue for Ruby/Python we cannot efficiently
  work with const refs)
- Updated test data because the previous implementation wasn't
  using refs but rather copies of device and device class
  objects.
 2019-01-31 22:23:58 +01:00
Matthias Koefferlein 4068478887 Implemented SPICE writer + tests. 2019-01-31 00:07:10 +01:00
Matthias Koefferlein 29264013b0 WIP: more consistent handling of polygon splitting parameters. 2019-01-25 22:28:25 +01:00
Matthias Koefferlein 6da9bc5e85 Updated tests after switching to boolean core. 2019-01-25 21:38:45 +01:00