Matthias Koefferlein
02e38a2cd1
Merge branch 'issue-482' into issue-471
2020-02-27 15:49:35 +01:00
Matthias Koefferlein
8b73dffcfe
Implementation done. Added tests.
2020-02-27 15:40:06 +01:00
Matthias Koefferlein
75e936bd64
Added one more test case.
2020-02-27 13:46:52 +01:00
Matthias Koefferlein
3b31109367
Added GSI binding for join_symmetric_nets, added method to get circuits by name pattern.
2020-02-27 12:17:35 +01:00
Matthias Koefferlein
a46cd305c6
WIP: bug fix for symmetry detection (should consider different pins to break symmetry). Added tests.
2020-02-27 00:52:06 +01:00
Matthias Koefferlein
b35429291e
WIP: join_nets implemented, join_symmetric_nets: enhanced detection of symmetric nets.
2020-02-27 00:52:03 +01:00
Matthias Koefferlein
08af8d85c4
WIP: first algorithm - is capable of deriving the 'resistor cube' symmetry.
2020-02-27 00:52:00 +01:00
Matthias Koefferlein
58de38739a
WIP: some refactoring, debugging output for netlist compare
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Abstraction: a central getenv() feature to wrap all the system-specific things
Netlist compare debug and options can be enabled through environment variables:
KLAYOUT_NETLIST_COMPARE_DEBUG_NETCOMPARE=1: print netlist compare debug info
KLAYOUT_NETLIST_COMPARE_DEBUG_NETGRAPH=1: print net grapg
KLAYOUT_NETLIST_COMPARE_CASE_SENSITIVE=1: make netlist compare case sensitive
2020-02-27 00:51:55 +01:00
Matthias Köfferlein
161068c70a
Merge pull request #492 from KLayout/issue-491
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Issue #491 fixed (maybe)
2020-02-16 10:15:53 +01:00
Matthias Koefferlein
961a36a7ad
Issue #491 fixed (maybe)
2020-02-03 22:38:45 +01:00
Matthias Köfferlein
aba55148db
Merge pull request #483 from KLayout/issue-481
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Fixed issue #481 (duplicate DRC markers)
2020-01-28 23:48:33 +01:00
Matthias Koefferlein
21397283f3
Fixed #477
2020-01-23 18:38:41 +01:00
Matthias Koefferlein
b1716fc8c4
Fixed issue #481
2020-01-23 17:26:12 +01:00
Matthias Köfferlein
6a996b6f5b
Merge pull request #465 from KLayout/issue-462
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Implemented #462 (Generalize MOS transistor extraction to other gate …
2020-01-05 01:02:54 +01:00
Matthias Koefferlein
b8c82c4f8b
Updated copyright notice to 2020
2020-01-05 00:59:43 +01:00
Matthias Koefferlein
811560094a
Updated tests.
2020-01-04 21:19:06 +01:00
Matthias Koefferlein
833edf53b2
Implemented #462 (Generalize MOS transistor extraction to other gate figures)
2020-01-02 22:20:45 +01:00
Matthias Koefferlein
c4636cebdb
Fixed #458 (Array instance net tracing bug)
2019-12-23 20:38:17 +01:00
Matthias Koefferlein
85c033db64
Small doc fixes
2019-12-21 18:00:02 +01:00
Matthias Koefferlein
297f37a63a
Huge performance improvement for a specific array element interaction. Reason: duplicate cluster interactions spoiled performance.
2019-12-18 01:10:16 +01:00
Matthias Koefferlein
fcba0018ba
Enhanced progress estimation of box scanner - no progress jumping back and forth.
2019-12-17 22:38:17 +01:00
Matthias Koefferlein
a9bd037b58
Some code cleanup with performance impact
2019-12-17 22:23:43 +01:00
Matthias Koefferlein
fb2611632d
Some performance improvement of net extractor.
2019-12-17 21:16:29 +01:00
Matthias Koefferlein
d0e6efa484
Implemented #444 (double-height standard-cell support).
2019-12-17 00:12:36 +01:00
Matthias Koefferlein
12c040aa6c
Merge branch 'issue-448' into dvb
2019-12-15 20:51:35 +01:00
Matthias Koefferlein
c9d528dc88
Fixed #447 - CentOS 6 build fixed.
2019-12-15 15:46:15 +01:00
Matthias Koefferlein
fccd78a222
Fixed #448 and updated test data
2019-12-15 10:37:51 +01:00
Matthias Koefferlein
782f6fe601
BUGFIX: the L2N and LVSDB writer was writing too much
...
Sometimes, shapes from child cells were propagated into
parent cells in the L2N and LVSDB output.
Because of this fix, many testdata files have to be updated.
2019-12-15 01:29:56 +01:00
Matthias Koefferlein
87e658acf0
WIP: finalized refactoring.
2019-12-15 00:48:11 +01:00
Matthias Koefferlein
da1ac3661f
WIP: bugfix of refactoriung, update test data.
2019-12-15 00:16:47 +01:00
Matthias Koefferlein
1e5d02b1bc
WIP: refactoring of cell instance interactions for net extraction.
2019-12-14 18:58:22 +01:00
Matthias Koefferlein
1f5ec9d3e9
Bugfix: don't mess with the hier cluster structure while determining the interactions ...
2019-12-12 00:20:15 +01:00
Matthias Koefferlein
e11aaf4ac2
WIP: Continued rework.
2019-12-11 23:35:19 +01:00
Matthias Koefferlein
fee5472845
WIP: further refactoring.
2019-12-11 01:28:56 +01:00
Matthias Koefferlein
406bc226bb
WIP: refactoring
2019-12-11 00:39:46 +01:00
Matthias Koefferlein
75cb21bbd1
WIP: refactoring, first steps.
2019-12-10 23:55:14 +01:00
Matthias Koefferlein
4acc4b96e2
First attempt to fix the issue
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Problem was caching which did not take into account the array nature
of instances.
This fix also moves the cache one level below so it is effective also
when instance tree traversal happens. This might speed up things too.
Needs testing.
2019-12-09 21:37:07 +01:00
Matthias Koefferlein
3b9beb0d49
Fixed #438 (error on redefinition of subcircuit in SPICE)
2019-12-07 23:39:39 +01:00
Matthias Köfferlein
2fa545d80b
Merge pull request #435 from KLayout/issue-429
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Issue 429
2019-12-02 21:15:05 +01:00
Matthias Köfferlein
e061a0a932
Merge pull request #433 from KLayout/wip
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Some enhancements
2019-12-02 21:14:35 +01:00
Matthias Köfferlein
8f8c393309
Merge pull request #432 from KLayout/issue-425
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Issue 425
2019-12-02 21:13:14 +01:00
Matthias Köfferlein
e7ddf3b64f
Merge pull request #431 from KLayout/issue-426
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Implemented #426 (feature request: group techs)
2019-12-02 21:12:40 +01:00
Matthias Koefferlein
baffb940d1
Implemented #429 : final touches to doc and tests for RBA/pya API.
2019-12-01 16:41:27 +01:00
Matthias Koefferlein
9eb09c3a5d
Enhancements to implementation
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- OASIS layers are turned into pure layer name (not lxdy_name) for
MAG output
- Boxes of instances had been incorrect
- consistent naming of cell files in presence of special chars
2019-11-30 22:30:28 +01:00
Matthias Koefferlein
c6ede46fd0
WIP: substantial changes
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- force lower-case layer names to allow CIF/MAG loop (CIF needs
upper-case layer names, MAG doesn't)
- reverted CIF reader to standard
- new options for writer: tech, "zero timestamp".
- file name MUST be consistent with one cell name.
Reason: it's not possible to derive the initial
cell from the given options, so without the file name
being consistent, we can't know what to write there.
Basically the file name rather supplies the path.
2019-11-30 00:09:44 +01:00
Matthias Koefferlein
3f9dd59593
WIP: MAG reader now is compliant with writer (and Magic I hope)
2019-11-29 00:25:28 +01:00
Matthias Koefferlein
0f1dc1d191
Refine pin mismatch handling so that only 'not used' nets will make a pin match against null.
2019-11-24 16:40:45 +01:00
Matthias Koefferlein
afacf7c0b5
WIP: fixed a segfault in the netlist browser.
2019-11-24 01:28:07 +01:00
Matthias Koefferlein
64bb01d80d
Dropped attempt to remove dummy nodes from spice reader netlist as this wasn't effective anyway.
2019-11-24 00:23:19 +01:00
Matthias Koefferlein
ed00503d41
Fixed Spice reader: must not use Netlist::purge_nets to remove dummy nets. Updated golden test data.
2019-11-23 23:36:52 +01:00