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Merge pull request #312 from KLayout/dvb

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Dvb
This commit is contained in:
Matthias Köfferlein
2019-07-27 22:32:59 +02:00
committed by GitHub
parent 432c28d7b4 4cee051255
commit 9a324727d2
89 changed files with 7865 additions and 1833 deletions
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testdata/algo/device_extract_au5_flattened_circuits.gds
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testdata/algo/lvs_test1_au.lvsdb.1
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+1 -1
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@@ -954,8 +954,8 @@ xref(
pin(2 2 match)
pin(4 4 match)
pin(3 3 match)
device(1 1 match)
device(3 2 match)
device(1 1 match)
)
)
circuit(INV2PAIR INV2PAIR match
testdata/algo/lvs_test1_au.lvsdb.2
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+1 -1
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@@ -954,8 +954,8 @@ xref(
pin(2 2 match)
pin(4 4 match)
pin(3 3 match)
device(1 1 match)
device(3 2 match)
device(1 1 match)
)
)
circuit(INV2PAIR INV2PAIR match
testdata/algo/lvs_test1b_au.lvsdb.1
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+1 -1
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@@ -954,8 +954,8 @@ xref(
pin(2 2 match)
pin(4 4 match)
pin(3 3 match)
device(1 1 match)
device(2 2 match)
device(1 1 match)
)
)
circuit(INV2PAIR INV2PAIR match
testdata/algo/lvs_test1b_au.lvsdb.2
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+1 -1
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@@ -954,8 +954,8 @@ xref(
pin(2 2 match)
pin(4 4 match)
pin(3 3 match)
device(1 1 match)
device(2 2 match)
device(1 1 match)
)
)
circuit(INV2PAIR INV2PAIR match
testdata/algo/lvs_test2_au.lvsdb.1
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+1 -1
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@@ -980,8 +980,8 @@ xref(
pin(2 2 match)
pin(4 4 match)
pin(3 3 match)
device(1 1 match)
device(3 2 match)
device(1 1 match)
)
)
circuit(INV2PAIR INV2PAIR nomatch
testdata/algo/lvs_test2_au.lvsdb.2
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+1 -1
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@@ -980,8 +980,8 @@ xref(
pin(2 2 match)
pin(4 4 match)
pin(3 3 match)
device(1 1 match)
device(3 2 match)
device(1 1 match)
)
)
circuit(INV2PAIR INV2PAIR nomatch
testdata/algo/lvs_test2b_au.lvsdb.1
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+1 -1
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@@ -980,8 +980,8 @@ xref(
pin(2 2 match)
pin(4 4 match)
pin(3 3 match)
device(1 1 match)
device(2 2 match)
device(1 1 match)
)
)
circuit(INV2PAIR INV2PAIR nomatch
testdata/algo/lvs_test2b_au.lvsdb.2
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+1 -1
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@@ -980,8 +980,8 @@ xref(
pin(2 2 match)
pin(4 4 match)
pin(3 3 match)
device(1 1 match)
device(2 2 match)
device(1 1 match)
)
)
circuit(INV2PAIR INV2PAIR nomatch
testdata/algo/nreader7.cir
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+31
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@@ -0,0 +1,31 @@
* RINGO netlist with global nets
.GLOBAL VDD
.GLOBAL VSS
.SUBCKT RINGO FB OUT ENABLE
X$1 1 FB ENABLE ND2X1
X$2 2 1 INVX1
X$3 3 2 INVX1
X$4 4 3 INVX1
X$5 5 4 INVX1
X$6 6 5 INVX1
X$7 7 6 INVX1
X$8 8 7 INVX1
X$9 9 8 INVX1
X$10 10 9 INVX1
X$11 FB 10 INVX1
X$12 OUT FB INVX1
.ENDS RINGO
.SUBCKT ND2X1 OUT B A
M$1 OUT A VDD VDD MLVPMOS L=0.25U W=1.5U AS=0.6375P AD=0.3375P PS=3.85U PD=1.95U
M$2 VDD B OUT VDD MLVPMOS L=0.25U W=1.5U AS=0.3375P AD=0.6375P PS=1.95U PD=3.85U
M$3 VSS A INT VSS MLVNMOS L=0.25U W=0.95U AS=0.40375P AD=0.21375P PS=2.75U PD=1.4U
M$4 INT B OUT VSS MLVNMOS L=0.25U W=0.95U AS=0.21375P AD=0.40375P PS=1.4U PD=2.75U
.ENDS ND2X1
.SUBCKT INVX1 OUT IN
M$1 VDD IN OUT VDD MLVPMOS L=0.25U W=1.5U AS=0.6375P AD=0.6375P PS=3.85U PD=3.85U
M$2 VSS IN OUT VSS MLVNMOS L=0.25U W=0.95U AS=0.40375P AD=0.40375P PS=2.75U PD=2.75U
.ENDS INVX1
testdata/drc/drcSimpleTests_11.drc
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+5 -2
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@@ -91,8 +91,8 @@ class CustomResistorExtraction < RBA::GenericDeviceExtractor
# -> W = p-sqrt(p*p-A)
# (p=P/4)
p = 0.25 * r.perimeter
a = r.area
p = sdbu * 0.25 * r.perimeter
a = sdbu * sdbu * r.area
d = Math.sqrt(p * p - a)
l = p + d
@@ -102,7 +102,10 @@ class CustomResistorExtraction < RBA::GenericDeviceExtractor
device = create_device
device.trans = RBA::DCplxTrans::new(RBA::CplxTrans::new(dbu) * (r.bbox.center - RBA::Point::new));
device.set_parameter(RBA::DeviceClassResistor::PARAM_R, @sheet_rho * l / w);
device.set_parameter(RBA::DeviceClassResistor::PARAM_A, a);
define_terminal(device, RBA::DeviceClassResistor::TERMINAL_A, conductor_geometry_index, terminals[0]);
define_terminal(device, RBA::DeviceClassResistor::TERMINAL_B, conductor_geometry_index, terminals[1]);
testdata/lvs/inv.lvsdb
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+13 -13
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@@ -18,21 +18,21 @@ layout(
layer(l12 'METAL2 (9/0)')
layer(l13 'METAL2_LABEL (9/1)')
layer(l7)
layer(l1)
layer(l5)
layer(l2)
layer(l6)
# Mask layer connectivity
connect(l3 l3)
connect(l4 l4 l8)
connect(l8 l4 l8 l9 l1 l5)
connect(l8 l4 l8 l9 l2 l6)
connect(l9 l8 l9 l10 l11)
connect(l10 l9 l10)
connect(l11 l9 l11 l12)
connect(l12 l11 l12 l13)
connect(l13 l12 l13)
connect(l7 l7)
connect(l1 l8 l1)
connect(l5 l8 l5)
connect(l2 l8 l2)
connect(l6 l8 l6)
# Global nets and connectivity
global(l3 NWELL)
@@ -46,13 +46,13 @@ layout(
# Device abstracts list the pin shapes of the devices.
device(D$PMOS PMOS
terminal(S
rect(l1 (-575 -750) (450 1500))
rect(l2 (-575 -750) (450 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (450 1500))
rect(l2 (125 -750) (450 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -60,13 +60,13 @@ layout(
)
device(D$NMOS NMOS
terminal(S
rect(l5 (-575 -450) (450 900))
rect(l6 (-575 -450) (450 900))
)
terminal(G
rect(l4 (-125 -450) (250 900))
)
terminal(D
rect(l5 (125 -450) (450 900))
rect(l6 (125 -450) (450 900))
)
terminal(B
rect(l7 (-125 -450) (250 900))
@@ -98,7 +98,7 @@ layout(
rect(l11 (-200 300) (200 200))
rect(l12 (-750 -850) (2000 1000))
rect(l13 (-101 -851) (2 2))
rect(l5 (-1451 49) (450 900))
rect(l6 (-1451 49) (450 900))
)
net(3 name(VDD)
rect(l8 (550 4350) (200 200))
@@ -109,7 +109,7 @@ layout(
rect(l11 (-200 300) (200 200))
rect(l12 (-750 -850) (2000 1000))
rect(l13 (-151 -851) (2 2))
rect(l1 (-1401 -851) (450 1500))
rect(l2 (-1401 -851) (450 1500))
)
net(4 name(OUT)
rect(l8 (1300 4350) (200 200))
@@ -122,8 +122,8 @@ layout(
rect(l9 (-300 -2900) (450 400))
rect(l9 (-450 -1550) (300 850))
rect(l10 (-51 499) (2 2))
rect(l1 (-351 2649) (450 1500))
rect(l5 (-450 -5500) (450 900))
rect(l2 (-351 2649) (450 1500))
rect(l6 (-450 -5500) (450 900))
)
net(5 name(NWELL)
rect(l3 (0 2950) (2000 3200))
testdata/lvs/inv2.lvsdb
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+13 -13
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@@ -11,34 +11,34 @@ J(
L(l14 'METAL2 (9/0)')
L(l15 'METAL2_LABEL (9/1)')
L(l7)
L(l1)
L(l2)
L(l9)
L(l5)
L(l6)
L(l10)
C(l3 l3 l9)
C(l4 l4 l8)
C(l8 l4 l8 l11 l1 l9 l5 l10)
C(l8 l4 l8 l11 l2 l9 l6 l10)
C(l11 l8 l11 l12 l13)
C(l12 l11 l12)
C(l13 l11 l13 l14)
C(l14 l13 l14 l15)
C(l15 l14 l15)
C(l7 l7)
C(l1 l8 l1)
C(l2 l8 l2)
C(l9 l3 l8 l9)
C(l5 l8 l5)
C(l6 l8 l6)
C(l10 l8 l10)
G(l7 SUBSTRATE)
G(l10 SUBSTRATE)
D(D$PMOS PMOS
T(S
R(l1 (-575 -750) (450 1500))
R(l2 (-575 -750) (450 1500))
)
T(G
R(l4 (-125 -750) (250 1500))
)
T(D
R(l1 (125 -750) (450 1500))
R(l2 (125 -750) (450 1500))
)
T(B
R(l3 (-125 -750) (250 1500))
@@ -46,13 +46,13 @@ J(
)
D(D$NMOS NMOS
T(S
R(l5 (-575 -450) (450 900))
R(l6 (-575 -450) (450 900))
)
T(G
R(l4 (-125 -450) (250 900))
)
T(D
R(l5 (125 -450) (450 900))
R(l6 (125 -450) (450 900))
)
T(B
R(l7 (-125 -450) (250 900))
@@ -84,7 +84,7 @@ J(
R(l13 (-200 300) (200 200))
R(l14 (-2350 -850) (3000 1000))
R(l15 (-151 -851) (2 2))
R(l1 (-2401 -851) (450 1500))
R(l2 (-2401 -851) (450 1500))
R(l9 (1050 -1200) (600 1200))
)
N(3 I(OUT)
@@ -98,8 +98,8 @@ J(
R(l11 (-300 -2900) (450 400))
R(l11 (-450 -1550) (300 850))
R(l12 (-51 499) (2 2))
R(l1 (-351 2649) (450 1500))
R(l5 (-450 -5500) (450 900))
R(l2 (-351 2649) (450 1500))
R(l6 (-450 -5500) (450 900))
)
N(4 I(VSS)
R(l8 (550 300) (200 200))
@@ -114,7 +114,7 @@ J(
R(l13 (-200 300) (200 200))
R(l14 (-2350 -850) (3000 1000))
R(l15 (-151 -851) (2 2))
R(l5 (-2401 49) (450 900))
R(l6 (-2401 49) (450 900))
R(l10 (1050 -900) (600 1200))
)
D(1 D$PMOS
testdata/lvs/ringo_scaled.cir
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@@ -0,0 +1,27 @@
.SUBCKT RINGO VSS VDD FB ENABLE OUT
X$1 VDD 1 VSS VDD FB ENABLE VSS ND2X1
X$2 VDD 2 VSS VDD 1 VSS INVX1
X$3 VDD 3 VSS VDD 2 VSS INVX1
X$4 VDD 4 VSS VDD 3 VSS INVX1
X$5 VDD 5 VSS VDD 4 VSS INVX1
X$6 VDD 6 VSS VDD 5 VSS INVX1
X$7 VDD 7 VSS VDD 6 VSS INVX1
X$8 VDD 8 VSS VDD 7 VSS INVX1
X$9 VDD 9 VSS VDD 8 VSS INVX1
X$10 VDD 10 VSS VDD 9 VSS INVX1
X$11 VDD FB VSS VDD 10 VSS INVX1
X$12 VDD OUT VSS VDD FB VSS INVX1
.ENDS RINGO
.SUBCKT ND2X1 VDD OUT VSS NWELL B A BULK
M$1 OUT A VDD NWELL PMOS L=0.5U W=3U
M$2 VDD B OUT NWELL PMOS L=0.5U W=3U
M$3 VSS A 1 BULK NMOS L=0.5U W=1.9U
M$4 1 B OUT BULK NMOS L=0.5U W=1.9U
.ENDS ND2X1
.SUBCKT INVX1 VDD OUT VSS NWELL IN BULK
M$1 VDD IN OUT NWELL PMOS L=0.5U W=3U
M$2 VSS IN OUT BULK NMOS L=0.5U W=1.9U
.ENDS INVX1
testdata/lvs/ringo_simple.lvsdb.1
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+86 -86
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@@ -16,22 +16,22 @@ layout(
layer(l12 '10/0')
layer(l13 '11/0')
layer(l7)
layer(l1)
layer(l2)
layer(l9)
layer(l5)
layer(l6)
layer(l10)
# Mask layer connectivity
connect(l3 l3 l9)
connect(l4 l4 l8)
connect(l8 l4 l8 l11 l1 l9 l5 l10)
connect(l8 l4 l8 l11 l2 l9 l6 l10)
connect(l11 l8 l11 l12)
connect(l12 l11 l12 l13)
connect(l13 l12 l13)
connect(l7 l7)
connect(l1 l8 l1)
connect(l2 l8 l2)
connect(l9 l3 l8 l9)
connect(l5 l8 l5)
connect(l6 l8 l6)
connect(l10 l8 l10)
# Global nets and connectivity
@@ -46,13 +46,13 @@ layout(
# Device abstracts list the pin shapes of the devices.
device(D$PMOS PMOS
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (450 1500))
rect(l2 (125 -750) (450 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -60,13 +60,13 @@ layout(
)
device(D$PMOS$1 PMOS
terminal(S
rect(l1 (-575 -750) (450 1500))
rect(l2 (-575 -750) (450 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -74,13 +74,13 @@ layout(
)
device(D$PMOS$2 PMOS
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -88,13 +88,13 @@ layout(
)
device(D$NMOS NMOS
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (450 950))
rect(l6 (125 -475) (450 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -102,13 +102,13 @@ layout(
)
device(D$NMOS$1 NMOS
terminal(S
rect(l5 (-575 -475) (450 950))
rect(l6 (-575 -475) (450 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -116,13 +116,13 @@ layout(
)
device(D$NMOS$2 NMOS
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -144,8 +144,8 @@ layout(
rect(l11 (-240 -790) (300 1700))
rect(l11 (-1350 0) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l1 (-276 -2151) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l2 (-276 -2151) (425 1500))
rect(l2 (-400 -1500) (425 1500))
)
net(2 name(OUT)
rect(l8 (1810 1770) (180 180))
@@ -163,9 +163,9 @@ layout(
rect(l11 (-1751 1099) (300 1400))
rect(l11 (1100 -1700) (300 300))
rect(l11 (-300 0) (300 1400))
rect(l1 (-1750 -1450) (425 1500))
rect(l1 (950 -1500) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1750 -1450) (425 1500))
rect(l2 (950 -1500) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -173,7 +173,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l5 (-951 859) (425 950))
rect(l6 (-951 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2600 3500))
@@ -200,8 +200,8 @@ layout(
)
net(7 name(SUBSTRATE))
net(8
rect(l5 (975 1660) (425 950))
rect(l5 (-400 -950) (425 950))
rect(l6 (975 1660) (425 950))
rect(l6 (-400 -950) (425 950))
)
# Outgoing pins and their connections to nets
@@ -282,7 +282,7 @@ layout(
rect(l11 (-650 300) (1800 800))
rect(l11 (-1450 -1100) (300 300))
rect(l11 (299 399) (2 2))
rect(l1 (-651 -2151) (425 1500))
rect(l2 (-651 -2151) (425 1500))
)
net(2 name(OUT)
rect(l8 (1110 5160) (180 180))
@@ -292,8 +292,8 @@ layout(
rect(l8 (-180 370) (180 180))
rect(l11 (-240 -790) (300 4790))
rect(l11 (-151 -2501) (2 2))
rect(l1 (-226 1049) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-226 1049) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -301,7 +301,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (1800 800))
rect(l11 (-851 -401) (2 2))
rect(l5 (-651 859) (425 950))
rect(l6 (-651 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2000 3500))
@@ -364,63 +364,63 @@ layout(
net(1
rect(l8 (4710 3010) (180 180))
rect(l11 (-850 -240) (610 300))
rect(l1 (-2550 1800) (425 1500))
rect(l1 (950 -1500) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-2550 1800) (425 1500))
rect(l2 (950 -1500) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(2
rect(l8 (6510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3
rect(l8 (8310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(4
rect(l8 (10110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(5
rect(l8 (11910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(6
rect(l8 (13710 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(7
rect(l8 (15510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(8
rect(l8 (17310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(9
rect(l8 (19110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(10
rect(l8 (20910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(11 name(FB)
rect(l8 (22710 3010) (180 180))
@@ -434,8 +434,8 @@ layout(
rect(l13 (-17921 -201) (2 2))
rect(l13 (-221 -201) (400 400))
rect(l13 (17740 -400) (400 400))
rect(l1 (-245 850) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-245 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(12 name(VDD)
rect(l3 (500 4500) (1400 3500))
@@ -457,19 +457,19 @@ layout(
rect(l11 (-750 -1450) (300 1400))
rect(l11 (-101 -351) (2 2))
rect(l11 (549 -401) (600 800))
rect(l1 (-23025 -2550) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l1 (1275 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l2 (-23025 -2550) (425 1500))
rect(l2 (-400 -1500) (425 1500))
rect(l2 (1275 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l9 (-21975 -450) (500 1500))
rect(l9 (22900 -1500) (500 1500))
)
@@ -478,8 +478,8 @@ layout(
rect(l12 (-260 -260) (200 200))
rect(l13 (-101 -101) (2 2))
rect(l13 (-201 -201) (400 400))
rect(l1 (-625 850) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-625 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(14 name(ENABLE)
rect(l8 (2510 3010) (180 180))
@@ -504,18 +504,18 @@ layout(
rect(l11 (-750 -1450) (1200 800))
rect(l11 (-551 -401) (2 2))
rect(l11 (549 -401) (600 800))
rect(l5 (-23700 460) (425 950))
rect(l5 (1975 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l6 (-23700 460) (425 950))
rect(l6 (1975 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l10 (-21975 -2210) (500 1500))
rect(l10 (22900 -1500) (500 1500))
)
@@ -905,8 +905,8 @@ xref(
pin(5 5 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(1 1 match)
)
)
circuit(ND2X1 ND2X1 match
@@ -926,10 +926,10 @@ xref(
pin(6 6 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(3 3 match)
device(4 4 match)
device(1 1 match)
device(2 2 match)
)
)
circuit(RINGO RINGO match
@@ -954,10 +954,6 @@ xref(
pin(2 4 match)
pin(1 1 match)
pin(4 0 match)
circuit(1 1 match)
circuit(10 10 match)
circuit(11 11 match)
circuit(12 12 match)
circuit(2 2 match)
circuit(3 3 match)
circuit(4 4 match)
@@ -966,6 +962,10 @@ xref(
circuit(7 7 match)
circuit(8 8 match)
circuit(9 9 match)
circuit(10 10 match)
circuit(11 11 match)
circuit(12 12 match)
circuit(1 1 match)
)
)
)
testdata/lvs/ringo_simple.lvsdb.2
Vendored
+86 -86
View File
@@ -16,22 +16,22 @@ layout(
layer(l12 '10/0')
layer(l13 '11/0')
layer(l7)
layer(l1)
layer(l2)
layer(l9)
layer(l5)
layer(l6)
layer(l10)
# Mask layer connectivity
connect(l3 l3 l9)
connect(l4 l4 l8)
connect(l8 l4 l8 l11 l1 l9 l5 l10)
connect(l8 l4 l8 l11 l2 l9 l6 l10)
connect(l11 l8 l11 l12)
connect(l12 l11 l12 l13)
connect(l13 l12 l13)
connect(l7 l7)
connect(l1 l8 l1)
connect(l2 l8 l2)
connect(l9 l3 l8 l9)
connect(l5 l8 l5)
connect(l6 l8 l6)
connect(l10 l8 l10)
# Global nets and connectivity
@@ -46,13 +46,13 @@ layout(
# Device abstracts list the pin shapes of the devices.
device(D$PMOS PMOS
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (450 1500))
rect(l2 (125 -750) (450 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -60,13 +60,13 @@ layout(
)
device(D$PMOS$1 PMOS
terminal(S
rect(l1 (-575 -750) (450 1500))
rect(l2 (-575 -750) (450 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -74,13 +74,13 @@ layout(
)
device(D$PMOS$2 PMOS
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -88,13 +88,13 @@ layout(
)
device(D$NMOS NMOS
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (450 950))
rect(l6 (125 -475) (450 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -102,13 +102,13 @@ layout(
)
device(D$NMOS$1 NMOS
terminal(S
rect(l5 (-575 -475) (450 950))
rect(l6 (-575 -475) (450 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -116,13 +116,13 @@ layout(
)
device(D$NMOS$2 NMOS
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -144,8 +144,8 @@ layout(
rect(l11 (-240 -790) (300 1700))
rect(l11 (-1350 0) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l1 (-276 -2151) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l2 (-276 -2151) (425 1500))
rect(l2 (-400 -1500) (425 1500))
)
net(2 name(OUT)
rect(l8 (1810 1770) (180 180))
@@ -163,9 +163,9 @@ layout(
rect(l11 (-1751 1099) (300 1400))
rect(l11 (1100 -1700) (300 300))
rect(l11 (-300 0) (300 1400))
rect(l1 (-375 -1450) (425 1500))
rect(l1 (-1800 -1500) (425 1500))
rect(l5 (950 -4890) (425 950))
rect(l2 (-375 -1450) (425 1500))
rect(l2 (-1800 -1500) (425 1500))
rect(l6 (950 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -173,7 +173,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l5 (-951 859) (425 950))
rect(l6 (-951 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2600 3500))
@@ -200,8 +200,8 @@ layout(
)
net(7 name(SUBSTRATE))
net(8
rect(l5 (975 1660) (425 950))
rect(l5 (-400 -950) (425 950))
rect(l6 (975 1660) (425 950))
rect(l6 (-400 -950) (425 950))
)
# Outgoing pins and their connections to nets
@@ -282,7 +282,7 @@ layout(
rect(l11 (-650 300) (1800 800))
rect(l11 (-1450 -1100) (300 300))
rect(l11 (299 399) (2 2))
rect(l1 (-651 -2151) (425 1500))
rect(l2 (-651 -2151) (425 1500))
)
net(2 name(OUT)
rect(l8 (1110 5160) (180 180))
@@ -292,8 +292,8 @@ layout(
rect(l8 (-180 370) (180 180))
rect(l11 (-240 -790) (300 4790))
rect(l11 (-151 -2501) (2 2))
rect(l1 (-226 1049) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-226 1049) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -301,7 +301,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (1800 800))
rect(l11 (-851 -401) (2 2))
rect(l5 (-651 859) (425 950))
rect(l6 (-651 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2000 3500))
@@ -364,63 +364,63 @@ layout(
net(1
rect(l8 (4710 3010) (180 180))
rect(l11 (-850 -240) (610 300))
rect(l1 (-1175 1800) (425 1500))
rect(l1 (-1800 -1500) (425 1500))
rect(l5 (950 -4890) (425 950))
rect(l2 (-1175 1800) (425 1500))
rect(l2 (-1800 -1500) (425 1500))
rect(l6 (950 -4890) (425 950))
)
net(2
rect(l8 (6510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3
rect(l8 (8310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(4
rect(l8 (10110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(5
rect(l8 (11910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(6
rect(l8 (13710 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(7
rect(l8 (15510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(8
rect(l8 (17310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(9
rect(l8 (19110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(10
rect(l8 (20910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(11 name(FB)
rect(l8 (22710 3010) (180 180))
@@ -434,8 +434,8 @@ layout(
rect(l13 (-17921 -201) (2 2))
rect(l13 (-221 -201) (400 400))
rect(l13 (17740 -400) (400 400))
rect(l1 (-245 850) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-245 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(12 name(VDD)
rect(l3 (500 4500) (1400 3500))
@@ -457,19 +457,19 @@ layout(
rect(l11 (-750 -1450) (300 1400))
rect(l11 (-101 -351) (2 2))
rect(l11 (549 -401) (600 800))
rect(l1 (-23025 -2550) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l1 (1275 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l2 (-23025 -2550) (425 1500))
rect(l2 (-400 -1500) (425 1500))
rect(l2 (1275 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l9 (-21975 -450) (500 1500))
rect(l9 (22900 -1500) (500 1500))
)
@@ -478,8 +478,8 @@ layout(
rect(l12 (-260 -260) (200 200))
rect(l13 (-101 -101) (2 2))
rect(l13 (-201 -201) (400 400))
rect(l1 (-625 850) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-625 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(14 name(ENABLE)
rect(l8 (2510 3010) (180 180))
@@ -504,18 +504,18 @@ layout(
rect(l11 (-750 -1450) (1200 800))
rect(l11 (-551 -401) (2 2))
rect(l11 (549 -401) (600 800))
rect(l5 (-23700 460) (425 950))
rect(l5 (1975 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l6 (-23700 460) (425 950))
rect(l6 (1975 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l10 (-21975 -2210) (500 1500))
rect(l10 (22900 -1500) (500 1500))
)
@@ -905,8 +905,8 @@ xref(
pin(5 5 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(1 1 match)
)
)
circuit(ND2X1 ND2X1 match
@@ -926,10 +926,10 @@ xref(
pin(6 6 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(3 3 match)
device(4 4 match)
device(1 1 match)
device(2 2 match)
)
)
circuit(RINGO RINGO match
@@ -954,10 +954,6 @@ xref(
pin(2 4 match)
pin(1 1 match)
pin(4 0 match)
circuit(1 1 match)
circuit(10 10 match)
circuit(11 11 match)
circuit(12 12 match)
circuit(2 2 match)
circuit(3 3 match)
circuit(4 4 match)
@@ -966,6 +962,10 @@ xref(
circuit(7 7 match)
circuit(8 8 match)
circuit(9 9 match)
circuit(10 10 match)
circuit(11 11 match)
circuit(12 12 match)
circuit(1 1 match)
)
)
)
testdata/lvs/ringo_simple_blackboxing.lvsdb
Vendored
+25 -13
View File
@@ -16,22 +16,22 @@ layout(
layer(l12 '10/0')
layer(l13 '11/0')
layer(l7 '13/0')
layer(l1)
layer(l2)
layer(l9)
layer(l5)
layer(l6)
layer(l10)
# Mask layer connectivity
connect(l3 l3 l9)
connect(l4 l4 l8)
connect(l8 l4 l8 l11 l1 l9 l5 l10)
connect(l8 l4 l8 l11 l2 l9 l6 l10)
connect(l11 l8 l11 l12)
connect(l12 l11 l12 l13)
connect(l13 l12 l13)
connect(l7 l7)
connect(l1 l8 l1)
connect(l2 l8 l2)
connect(l9 l3 l8 l9)
connect(l5 l8 l5)
connect(l6 l8 l6)
connect(l10 l8 l10)
# Global nets and connectivity
@@ -185,10 +185,22 @@ layout(
rect(l8 (17310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
)
net(12)
net(13)
net(14)
net(15)
net(12
rect(l8 (10110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
)
net(13
rect(l8 (11910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
)
net(14
rect(l8 (13710 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
)
net(15
rect(l8 (15510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
)
# Outgoing pins and their connections to nets
pin(5 name(FB))
@@ -525,10 +537,6 @@ xref(
pin(2 4 match)
pin(1 0 match)
pin(4 1 match)
circuit(1 1 match)
circuit(5 10 match)
circuit(6 11 match)
circuit(7 12 match)
circuit(2 2 match)
circuit(3 3 match)
circuit(17 4 match)
@@ -537,6 +545,10 @@ xref(
circuit(20 7 match)
circuit(21 8 match)
circuit(4 9 match)
circuit(5 10 match)
circuit(6 11 match)
circuit(7 12 match)
circuit(1 1 match)
)
)
)
testdata/lvs/ringo_simple_device_scaling.cir
Vendored
+83
View File
@@ -0,0 +1,83 @@
* Extracted by KLayout
* cell RINGO
* pin FB
* pin VDD
* pin OUT
* pin ENABLE
* pin VSS
.SUBCKT RINGO 11 12 13 14 15
* net 11 FB
* net 12 VDD
* net 13 OUT
* net 14 ENABLE
* net 15 VSS
* cell instance $1 r0 *1 1.8,0
X$1 12 1 15 12 11 14 15 ND2X1
* cell instance $2 r0 *1 4.2,0
X$2 12 2 15 12 1 15 INVX1
* cell instance $3 r0 *1 6,0
X$3 12 3 15 12 2 15 INVX1
* cell instance $4 r0 *1 7.8,0
X$4 12 4 15 12 3 15 INVX1
* cell instance $5 r0 *1 9.6,0
X$5 12 5 15 12 4 15 INVX1
* cell instance $6 r0 *1 11.4,0
X$6 12 6 15 12 5 15 INVX1
* cell instance $7 r0 *1 13.2,0
X$7 12 7 15 12 6 15 INVX1
* cell instance $8 r0 *1 15,0
X$8 12 8 15 12 7 15 INVX1
* cell instance $9 r0 *1 16.8,0
X$9 12 9 15 12 8 15 INVX1
* cell instance $10 r0 *1 18.6,0
X$10 12 10 15 12 9 15 INVX1
* cell instance $11 r0 *1 20.4,0
X$11 12 11 15 12 10 15 INVX1
* cell instance $12 r0 *1 22.2,0
X$12 12 13 15 12 11 15 INVX1
.ENDS RINGO
* cell INVX1
* pin VDD
* pin OUT
* pin VSS
* pin
* pin IN
* pin SUBSTRATE
.SUBCKT INVX1 1 2 3 4 5 6
* net 1 VDD
* net 2 OUT
* net 3 VSS
* net 5 IN
* net 6 SUBSTRATE
* device instance $1 r0 *1 0.85,5.8 PMOS
M$1 1 5 2 4 PMOS L=0.5U W=3U AS=2.55P AD=2.55P PS=7.7U PD=7.7U
* device instance $2 r0 *1 0.85,2.135 NMOS
M$2 3 5 2 6 NMOS L=0.5U W=1.9U AS=1.615P AD=1.615P PS=5.5U PD=5.5U
.ENDS INVX1
* cell ND2X1
* pin VDD
* pin OUT
* pin VSS
* pin
* pin B
* pin A
* pin SUBSTRATE
.SUBCKT ND2X1 1 2 3 4 5 6 7
* net 1 VDD
* net 2 OUT
* net 3 VSS
* net 5 B
* net 6 A
* net 7 SUBSTRATE
* device instance $1 r0 *1 0.85,5.8 PMOS
M$1 2 6 1 4 PMOS L=0.5U W=3U AS=2.55P AD=1.35P PS=7.7U PD=3.9U
* device instance $2 r0 *1 1.55,5.8 PMOS
M$2 1 5 2 4 PMOS L=0.5U W=3U AS=1.35P AD=2.55P PS=3.9U PD=7.7U
* device instance $3 r0 *1 0.85,2.135 NMOS
M$3 3 6 8 7 NMOS L=0.5U W=1.9U AS=1.615P AD=0.855P PS=5.5U PD=2.8U
* device instance $4 r0 *1 1.55,2.135 NMOS
M$4 8 5 2 7 NMOS L=0.5U W=1.9U AS=0.855P AD=1.615P PS=2.8U PD=5.5U
.ENDS ND2X1
testdata/lvs/ringo_simple_device_scaling.lvs
Vendored
+76
View File
@@ -0,0 +1,76 @@
source($lvs_test_source, "RINGO")
report_lvs($lvs_test_target_lvsdb, true)
target_netlist($lvs_test_target_cir, write_spice, "Extracted by KLayout")
schematic("ringo_scaled.cir")
deep
# Drawing layers
nwell = input(1, 0)
active = input(2, 0)
pplus = input(3, 0)
nplus = input(4, 0)
poly = input(5, 0)
contact = input(8, 0)
metal1 = input(9, 0)
via1 = input(10, 0)
metal2 = input(11, 0)
# Bulk layer for terminal provisioning
bulk = polygon_layer
# Computed layers
active_in_nwell = active & nwell
pactive = active_in_nwell & pplus
pgate = pactive & poly
psd = pactive - pgate
ntie = active_in_nwell & nplus
active_outside_nwell = active - nwell
nactive = active_outside_nwell & nplus
ngate = nactive & poly
nsd = nactive - ngate
ptie = active_outside_nwell & pplus
# Device extraction
device_scaling(2.0)
# PMOS transistor device extraction
extract_devices(mos4("PMOS"), { "SD" => psd, "G" => pgate, "W" => nwell,
"tS" => psd, "tD" => psd, "tG" => poly, "tW" => nwell })
# NMOS transistor device extraction
extract_devices(mos4("NMOS"), { "SD" => nsd, "G" => ngate, "W" => bulk,
"tS" => nsd, "tD" => nsd, "tG" => poly, "tW" => bulk })
# Define connectivity for netlist extraction
# Inter-layer
connect(psd, contact)
connect(nsd, contact)
connect(poly, contact)
connect(ntie, contact)
connect(nwell, ntie)
connect(ptie, contact)
connect(contact, metal1)
connect(metal1, via1)
connect(via1, metal2)
# Global
connect_global(bulk, "SUBSTRATE")
connect_global(ptie, "SUBSTRATE")
# Compare section
netlist.simplify
compare
testdata/lvs/ringo_simple_device_scaling.lvsdb.1
Vendored
+971
View File
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#%lvsdb-klayout
# Layout
layout(
top(RINGO)
unit(0.001)
# Layer section
# This section lists the mask layers (drawing or derived) and their connections.
# Mask layers
layer(l3 '1/0')
layer(l4 '5/0')
layer(l8 '8/0')
layer(l11 '9/0')
layer(l12 '10/0')
layer(l13 '11/0')
layer(l7)
layer(l2)
layer(l9)
layer(l6)
layer(l10)
# Mask layer connectivity
connect(l3 l3 l9)
connect(l4 l4 l8)
connect(l8 l4 l8 l11 l2 l9 l6 l10)
connect(l11 l8 l11 l12)
connect(l12 l11 l12 l13)
connect(l13 l12 l13)
connect(l7 l7)
connect(l2 l8 l2)
connect(l9 l3 l8 l9)
connect(l6 l8 l6)
connect(l10 l8 l10)
# Global nets and connectivity
global(l7 SUBSTRATE)
global(l10 SUBSTRATE)
# Device class section
class(PMOS MOS4)
class(NMOS MOS4)
# Device abstracts section
# Device abstracts list the pin shapes of the devices.
device(D$PMOS PMOS
terminal(S
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l2 (125 -750) (450 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
)
)
device(D$PMOS$1 PMOS
terminal(S
rect(l2 (-575 -750) (450 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
)
)
device(D$PMOS$2 PMOS
terminal(S
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
)
)
device(D$NMOS NMOS
terminal(S
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l6 (125 -475) (450 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
)
)
device(D$NMOS$1 NMOS
terminal(S
rect(l6 (-575 -475) (450 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
)
)
device(D$NMOS$2 NMOS
terminal(S
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
)
)
# Circuit section
# Circuits are the hierarchical building blocks of the netlist.
circuit(ND2X1
# Circuit boundary
rect((-100 400) (2600 7600))
# Nets with their geometries
net(1 name(VDD)
rect(l8 (1110 5160) (180 180))
rect(l8 (-180 920) (180 180))
rect(l8 (-180 -730) (180 180))
rect(l11 (-240 -790) (300 1700))
rect(l11 (-1350 0) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l2 (-276 -2151) (425 1500))
rect(l2 (-400 -1500) (425 1500))
)
net(2 name(OUT)
rect(l8 (1810 1770) (180 180))
rect(l8 (-180 370) (180 180))
rect(l8 (-1580 3760) (180 180))
rect(l8 (-180 -730) (180 180))
rect(l8 (-180 -730) (180 180))
rect(l8 (1220 920) (180 180))
rect(l8 (-180 -1280) (180 180))
rect(l8 (-180 370) (180 180))
polygon(l11 (-240 -4180) (0 1390) (490 0) (0 -300) (-190 0) (0 -1090))
rect(l11 (-110 1390) (300 1400))
polygon(l11 (-1890 0) (0 600) (300 0) (0 -300) (1590 0) (0 -300))
rect(l11 (-141 -501) (2 2))
rect(l11 (-1751 1099) (300 1400))
rect(l11 (1100 -1700) (300 300))
rect(l11 (-300 0) (300 1400))
rect(l2 (-1750 -1450) (425 1500))
rect(l2 (950 -1500) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
rect(l8 (-180 370) (180 180))
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l6 (-951 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2600 3500))
)
net(5 name(B)
rect(l4 (1425 2860) (250 1940))
rect(l4 (-345 -950) (300 300))
rect(l4 (-205 650) (250 2000))
rect(l4 (-250 -2000) (250 2000))
rect(l4 (-250 -5390) (250 1450))
rect(l8 (-285 1050) (180 180))
rect(l11 (-71 -91) (2 2))
rect(l11 (-171 -151) (300 300))
)
net(6 name(A)
rect(l4 (725 2860) (250 1940))
rect(l4 (-325 -1850) (300 300))
rect(l4 (-225 1550) (250 2000))
rect(l4 (-250 -2000) (250 2000))
rect(l4 (-250 -5390) (250 1450))
rect(l8 (-265 150) (180 180))
rect(l11 (-91 -91) (2 2))
rect(l11 (-151 -151) (300 300))
)
net(7 name(SUBSTRATE))
net(8
rect(l6 (975 1660) (425 950))
rect(l6 (-400 -950) (425 950))
)
# Outgoing pins and their connections to nets
pin(1 name(VDD))
pin(2 name(OUT))
pin(3 name(VSS))
pin(4)
pin(5 name(B))
pin(6 name(A))
pin(7 name(SUBSTRATE))
# Devices and their connections
device(1 D$PMOS
location(850 5800)
param(L 0.5)
param(W 3)
param(AS 2.55)
param(AD 1.35)
param(PS 7.7)
param(PD 3.9)
terminal(S 2)
terminal(G 6)
terminal(D 1)
terminal(B 4)
)
device(2 D$PMOS$1
location(1550 5800)
param(L 0.5)
param(W 3)
param(AS 1.35)
param(AD 2.55)
param(PS 3.9)
param(PD 7.7)
terminal(S 1)
terminal(G 5)
terminal(D 2)
terminal(B 4)
)
device(3 D$NMOS
location(850 2135)
param(L 0.5)
param(W 1.9)
param(AS 1.615)
param(AD 0.855)
param(PS 5.5)
param(PD 2.8)
terminal(S 3)
terminal(G 6)
terminal(D 8)
terminal(B 7)
)
device(4 D$NMOS$1
location(1550 2135)
param(L 0.5)
param(W 1.9)
param(AS 0.855)
param(AD 1.615)
param(PS 2.8)
param(PD 5.5)
terminal(S 8)
terminal(G 5)
terminal(D 2)
terminal(B 7)
)
)
circuit(INVX1
# Circuit boundary
rect((-100 400) (2000 7600))
# Nets with their geometries
net(1 name(VDD)
rect(l8 (410 6260) (180 180))
rect(l8 (-180 -730) (180 180))
rect(l8 (-180 -730) (180 180))
rect(l11 (-240 -240) (300 1400))
rect(l11 (-650 300) (1800 800))
rect(l11 (-1450 -1100) (300 300))
rect(l11 (299 399) (2 2))
rect(l2 (-651 -2151) (425 1500))
)
net(2 name(OUT)
rect(l8 (1110 5160) (180 180))
rect(l8 (-180 920) (180 180))
rect(l8 (-180 -730) (180 180))
rect(l8 (-180 -4120) (180 180))
rect(l8 (-180 370) (180 180))
rect(l11 (-240 -790) (300 4790))
rect(l11 (-151 -2501) (2 2))
rect(l2 (-226 1049) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
rect(l8 (-180 370) (180 180))
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (1800 800))
rect(l11 (-851 -401) (2 2))
rect(l6 (-651 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2000 3500))
)
net(5 name(IN)
rect(l4 (725 2860) (250 1940))
rect(l4 (-525 -1850) (300 300))
rect(l4 (-25 1550) (250 2000))
rect(l4 (-250 -2000) (250 2000))
rect(l4 (-250 -5390) (250 1450))
rect(l8 (-465 150) (180 180))
rect(l11 (-91 -91) (2 2))
rect(l11 (-151 -151) (300 300))
)
net(6 name(SUBSTRATE))
# Outgoing pins and their connections to nets
pin(1 name(VDD))
pin(2 name(OUT))
pin(3 name(VSS))
pin(4)
pin(5 name(IN))
pin(6 name(SUBSTRATE))
# Devices and their connections
device(1 D$PMOS$2
location(850 5800)
param(L 0.5)
param(W 3)
param(AS 2.55)
param(AD 2.55)
param(PS 7.7)
param(PD 7.7)
terminal(S 1)
terminal(G 5)
terminal(D 2)
terminal(B 4)
)
device(2 D$NMOS$2
location(850 2135)
param(L 0.5)
param(W 1.9)
param(AS 1.615)
param(AD 1.615)
param(PS 5.5)
param(PD 5.5)
terminal(S 3)
terminal(G 5)
terminal(D 2)
terminal(B 6)
)
)
circuit(RINGO
# Circuit boundary
rect((0 350) (25800 7650))
# Nets with their geometries
net(1
rect(l8 (4710 3010) (180 180))
rect(l11 (-850 -240) (610 300))
rect(l2 (-2550 1800) (425 1500))
rect(l2 (950 -1500) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(2
rect(l8 (6510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3
rect(l8 (8310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(4
rect(l8 (10110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(5
rect(l8 (11910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(6
rect(l8 (13710 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(7
rect(l8 (15510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(8
rect(l8 (17310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(9
rect(l8 (19110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(10
rect(l8 (20910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(11 name(FB)
rect(l8 (22710 3010) (180 180))
rect(l8 (-19700 720) (180 180))
rect(l11 (18380 -1140) (900 300))
rect(l11 (-19530 590) (320 320))
rect(l11 (17820 -320) (320 320))
rect(l12 (-18400 -260) (200 200))
rect(l12 (17940 -200) (200 200))
rect(l13 (-18040 -300) (17740 400))
rect(l13 (-17921 -201) (2 2))
rect(l13 (-221 -201) (400 400))
rect(l13 (17740 -400) (400 400))
rect(l2 (-245 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(12 name(VDD)
rect(l3 (500 4500) (1400 3500))
rect(l3 (-1900 -3500) (600 3500))
rect(l3 (23300 -3500) (1400 3500))
rect(l3 (-100 -3500) (600 3500))
rect(l8 (-24690 -1240) (180 180))
rect(l8 (-180 370) (180 180))
rect(l8 (-180 -1280) (180 180))
rect(l8 (23220 370) (180 180))
rect(l8 (-180 370) (180 180))
rect(l8 (-180 -1280) (180 180))
rect(l11 (-21741 859) (2 2))
rect(l11 (-2351 -451) (1200 800))
rect(l11 (-750 -1450) (300 1400))
rect(l11 (-101 -351) (2 2))
rect(l11 (-1251 -401) (600 800))
rect(l11 (23400 -800) (1200 800))
rect(l11 (-750 -1450) (300 1400))
rect(l11 (-101 -351) (2 2))
rect(l11 (549 -401) (600 800))
rect(l2 (-23025 -2550) (425 1500))
rect(l2 (-400 -1500) (425 1500))
rect(l2 (1275 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l9 (-21975 -450) (500 1500))
rect(l9 (22900 -1500) (500 1500))
)
net(13 name(OUT)
rect(l11 (23440 3840) (320 320))
rect(l12 (-260 -260) (200 200))
rect(l13 (-101 -101) (2 2))
rect(l13 (-201 -201) (400 400))
rect(l2 (-625 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(14 name(ENABLE)
rect(l8 (2510 3010) (180 180))
rect(l11 (-250 -250) (320 320))
rect(l12 (-260 -260) (200 200))
rect(l13 (-101 -101) (2 2))
rect(l13 (-201 -201) (400 400))
)
net(15 name(VSS)
rect(l8 (1110 1610) (180 180))
rect(l8 (-180 -1280) (180 180))
rect(l8 (-180 370) (180 180))
rect(l8 (23220 370) (180 180))
rect(l8 (-180 -1280) (180 180))
rect(l8 (-180 370) (180 180))
rect(l11 (-21741 -391) (2 2))
rect(l11 (-1901 -401) (300 1400))
rect(l11 (-750 -1450) (1200 800))
rect(l11 (-551 -401) (2 2))
rect(l11 (-1251 -401) (600 800))
rect(l11 (23850 -750) (300 1400))
rect(l11 (-750 -1450) (1200 800))
rect(l11 (-551 -401) (2 2))
rect(l11 (549 -401) (600 800))
rect(l6 (-23700 460) (425 950))
rect(l6 (1975 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l10 (-21975 -2210) (500 1500))
rect(l10 (22900 -1500) (500 1500))
)
# Outgoing pins and their connections to nets
pin(11 name(FB))
pin(12 name(VDD))
pin(13 name(OUT))
pin(14 name(ENABLE))
pin(15 name(VSS))
# Subcircuits and their connections
circuit(1 ND2X1 location(1800 0)
pin(0 12)
pin(1 1)
pin(2 15)
pin(3 12)
pin(4 11)
pin(5 14)
pin(6 15)
)
circuit(2 INVX1 location(4200 0)
pin(0 12)
pin(1 2)
pin(2 15)
pin(3 12)
pin(4 1)
pin(5 15)
)
circuit(3 INVX1 location(6000 0)
pin(0 12)
pin(1 3)
pin(2 15)
pin(3 12)
pin(4 2)
pin(5 15)
)
circuit(4 INVX1 location(7800 0)
pin(0 12)
pin(1 4)
pin(2 15)
pin(3 12)
pin(4 3)
pin(5 15)
)
circuit(5 INVX1 location(9600 0)
pin(0 12)
pin(1 5)
pin(2 15)
pin(3 12)
pin(4 4)
pin(5 15)
)
circuit(6 INVX1 location(11400 0)
pin(0 12)
pin(1 6)
pin(2 15)
pin(3 12)
pin(4 5)
pin(5 15)
)
circuit(7 INVX1 location(13200 0)
pin(0 12)
pin(1 7)
pin(2 15)
pin(3 12)
pin(4 6)
pin(5 15)
)
circuit(8 INVX1 location(15000 0)
pin(0 12)
pin(1 8)
pin(2 15)
pin(3 12)
pin(4 7)
pin(5 15)
)
circuit(9 INVX1 location(16800 0)
pin(0 12)
pin(1 9)
pin(2 15)
pin(3 12)
pin(4 8)
pin(5 15)
)
circuit(10 INVX1 location(18600 0)
pin(0 12)
pin(1 10)
pin(2 15)
pin(3 12)
pin(4 9)
pin(5 15)
)
circuit(11 INVX1 location(20400 0)
pin(0 12)
pin(1 11)
pin(2 15)
pin(3 12)
pin(4 10)
pin(5 15)
)
circuit(12 INVX1 location(22200 0)
pin(0 12)
pin(1 13)
pin(2 15)
pin(3 12)
pin(4 11)
pin(5 15)
)
)
)
# Reference netlist
reference(
# Device class section
class(PMOS MOS4)
class(NMOS MOS4)
# Circuit section
# Circuits are the hierarchical building blocks of the netlist.
circuit(ND2X1
# Nets
net(1 name(VDD))
net(2 name(OUT))
net(3 name(VSS))
net(4 name(NWELL))
net(5 name(B))
net(6 name(A))
net(7 name(BULK))
net(8 name('1'))
# Outgoing pins and their connections to nets
pin(1 name(VDD))
pin(2 name(OUT))
pin(3 name(VSS))
pin(4 name(NWELL))
pin(5 name(B))
pin(6 name(A))
pin(7 name(BULK))
# Devices and their connections
device(1 PMOS
name($1)
param(L 0.5)
param(W 3)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 2)
terminal(G 6)
terminal(D 1)
terminal(B 4)
)
device(2 PMOS
name($2)
param(L 0.5)
param(W 3)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 1)
terminal(G 5)
terminal(D 2)
terminal(B 4)
)
device(3 NMOS
name($3)
param(L 0.5)
param(W 1.9)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 3)
terminal(G 6)
terminal(D 8)
terminal(B 7)
)
device(4 NMOS
name($4)
param(L 0.5)
param(W 1.9)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 8)
terminal(G 5)
terminal(D 2)
terminal(B 7)
)
)
circuit(INVX1
# Nets
net(1 name(VDD))
net(2 name(OUT))
net(3 name(VSS))
net(4 name(NWELL))
net(5 name(IN))
net(6 name(BULK))
# Outgoing pins and their connections to nets
pin(1 name(VDD))
pin(2 name(OUT))
pin(3 name(VSS))
pin(4 name(NWELL))
pin(5 name(IN))
pin(6 name(BULK))
# Devices and their connections
device(1 PMOS
name($1)
param(L 0.5)
param(W 3)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 1)
terminal(G 5)
terminal(D 2)
terminal(B 4)
)
device(2 NMOS
name($2)
param(L 0.5)
param(W 1.9)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 3)
terminal(G 5)
terminal(D 2)
terminal(B 6)
)
)
circuit(RINGO
# Nets
net(1 name(VSS))
net(2 name(VDD))
net(3 name(FB))
net(4 name(ENABLE))
net(5 name(OUT))
net(6 name('1'))
net(7 name('2'))
net(8 name('3'))
net(9 name('4'))
net(10 name('5'))
net(11 name('6'))
net(12 name('7'))
net(13 name('8'))
net(14 name('9'))
net(15 name('10'))
# Outgoing pins and their connections to nets
pin(1 name(VSS))
pin(2 name(VDD))
pin(3 name(FB))
pin(4 name(ENABLE))
pin(5 name(OUT))
# Subcircuits and their connections
circuit(1 ND2X1 name($1)
pin(0 2)
pin(1 6)
pin(2 1)
pin(3 2)
pin(4 3)
pin(5 4)
pin(6 1)
)
circuit(2 INVX1 name($2)
pin(0 2)
pin(1 7)
pin(2 1)
pin(3 2)
pin(4 6)
pin(5 1)
)
circuit(3 INVX1 name($3)
pin(0 2)
pin(1 8)
pin(2 1)
pin(3 2)
pin(4 7)
pin(5 1)
)
circuit(4 INVX1 name($4)
pin(0 2)
pin(1 9)
pin(2 1)
pin(3 2)
pin(4 8)
pin(5 1)
)
circuit(5 INVX1 name($5)
pin(0 2)
pin(1 10)
pin(2 1)
pin(3 2)
pin(4 9)
pin(5 1)
)
circuit(6 INVX1 name($6)
pin(0 2)
pin(1 11)
pin(2 1)
pin(3 2)
pin(4 10)
pin(5 1)
)
circuit(7 INVX1 name($7)
pin(0 2)
pin(1 12)
pin(2 1)
pin(3 2)
pin(4 11)
pin(5 1)
)
circuit(8 INVX1 name($8)
pin(0 2)
pin(1 13)
pin(2 1)
pin(3 2)
pin(4 12)
pin(5 1)
)
circuit(9 INVX1 name($9)
pin(0 2)
pin(1 14)
pin(2 1)
pin(3 2)
pin(4 13)
pin(5 1)
)
circuit(10 INVX1 name($10)
pin(0 2)
pin(1 15)
pin(2 1)
pin(3 2)
pin(4 14)
pin(5 1)
)
circuit(11 INVX1 name($11)
pin(0 2)
pin(1 3)
pin(2 1)
pin(3 2)
pin(4 15)
pin(5 1)
)
circuit(12 INVX1 name($12)
pin(0 2)
pin(1 5)
pin(2 1)
pin(3 2)
pin(4 3)
pin(5 1)
)
)
)
# Cross reference
xref(
circuit(INVX1 INVX1 match
xref(
net(4 4 match)
net(5 5 match)
net(2 2 match)
net(6 6 match)
net(1 1 match)
net(3 3 match)
pin(3 3 match)
pin(4 4 match)
pin(1 1 match)
pin(5 5 match)
pin(0 0 match)
pin(2 2 match)
device(2 2 match)
device(1 1 match)
)
)
circuit(ND2X1 ND2X1 match
xref(
net(8 8 match)
net(4 4 match)
net(6 6 match)
net(5 5 match)
net(2 2 match)
net(7 7 match)
net(1 1 match)
net(3 3 match)
pin(3 3 match)
pin(5 5 match)
pin(4 4 match)
pin(1 1 match)
pin(6 6 match)
pin(0 0 match)
pin(2 2 match)
device(3 3 match)
device(4 4 match)
device(1 1 match)
device(2 2 match)
)
)
circuit(RINGO RINGO match
xref(
net(1 6 match)
net(10 15 match)
net(2 7 match)
net(3 8 match)
net(4 9 match)
net(5 10 match)
net(6 11 match)
net(7 12 match)
net(8 13 match)
net(9 14 match)
net(14 4 match)
net(11 3 match)
net(13 5 match)
net(12 2 match)
net(15 1 match)
pin(3 3 match)
pin(0 2 match)
pin(2 4 match)
pin(1 1 match)
pin(4 0 match)
circuit(2 2 match)
circuit(3 3 match)
circuit(4 4 match)
circuit(5 5 match)
circuit(6 6 match)
circuit(7 7 match)
circuit(8 8 match)
circuit(9 9 match)
circuit(10 10 match)
circuit(11 11 match)
circuit(12 12 match)
circuit(1 1 match)
)
)
)
testdata/lvs/ringo_simple_device_scaling.lvsdb.2
Vendored
+971
View File
@@ -0,0 +1,971 @@
#%lvsdb-klayout
# Layout
layout(
top(RINGO)
unit(0.001)
# Layer section
# This section lists the mask layers (drawing or derived) and their connections.
# Mask layers
layer(l3 '1/0')
layer(l4 '5/0')
layer(l8 '8/0')
layer(l11 '9/0')
layer(l12 '10/0')
layer(l13 '11/0')
layer(l7)
layer(l2)
layer(l9)
layer(l6)
layer(l10)
# Mask layer connectivity
connect(l3 l3 l9)
connect(l4 l4 l8)
connect(l8 l4 l8 l11 l2 l9 l6 l10)
connect(l11 l8 l11 l12)
connect(l12 l11 l12 l13)
connect(l13 l12 l13)
connect(l7 l7)
connect(l2 l8 l2)
connect(l9 l3 l8 l9)
connect(l6 l8 l6)
connect(l10 l8 l10)
# Global nets and connectivity
global(l7 SUBSTRATE)
global(l10 SUBSTRATE)
# Device class section
class(PMOS MOS4)
class(NMOS MOS4)
# Device abstracts section
# Device abstracts list the pin shapes of the devices.
device(D$PMOS PMOS
terminal(S
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l2 (125 -750) (450 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
)
)
device(D$PMOS$1 PMOS
terminal(S
rect(l2 (-575 -750) (450 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
)
)
device(D$PMOS$2 PMOS
terminal(S
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
)
)
device(D$NMOS NMOS
terminal(S
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l6 (125 -475) (450 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
)
)
device(D$NMOS$1 NMOS
terminal(S
rect(l6 (-575 -475) (450 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
)
)
device(D$NMOS$2 NMOS
terminal(S
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
)
)
# Circuit section
# Circuits are the hierarchical building blocks of the netlist.
circuit(ND2X1
# Circuit boundary
rect((-100 400) (2600 7600))
# Nets with their geometries
net(1 name(VDD)
rect(l8 (1110 5160) (180 180))
rect(l8 (-180 920) (180 180))
rect(l8 (-180 -730) (180 180))
rect(l11 (-240 -790) (300 1700))
rect(l11 (-1350 0) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l2 (-276 -2151) (425 1500))
rect(l2 (-400 -1500) (425 1500))
)
net(2 name(OUT)
rect(l8 (1810 1770) (180 180))
rect(l8 (-180 370) (180 180))
rect(l8 (-1580 3760) (180 180))
rect(l8 (-180 -730) (180 180))
rect(l8 (-180 -730) (180 180))
rect(l8 (1220 920) (180 180))
rect(l8 (-180 -1280) (180 180))
rect(l8 (-180 370) (180 180))
polygon(l11 (-240 -4180) (0 1390) (490 0) (0 -300) (-190 0) (0 -1090))
rect(l11 (-110 1390) (300 1400))
polygon(l11 (-1890 0) (0 600) (300 0) (0 -300) (1590 0) (0 -300))
rect(l11 (-141 -501) (2 2))
rect(l11 (-1751 1099) (300 1400))
rect(l11 (1100 -1700) (300 300))
rect(l11 (-300 0) (300 1400))
rect(l2 (-375 -1450) (425 1500))
rect(l2 (-1800 -1500) (425 1500))
rect(l6 (950 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
rect(l8 (-180 370) (180 180))
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l6 (-951 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2600 3500))
)
net(5 name(B)
rect(l4 (1425 2860) (250 1940))
rect(l4 (-345 -950) (300 300))
rect(l4 (-205 650) (250 2000))
rect(l4 (-250 -2000) (250 2000))
rect(l4 (-250 -5390) (250 1450))
rect(l8 (-285 1050) (180 180))
rect(l11 (-71 -91) (2 2))
rect(l11 (-171 -151) (300 300))
)
net(6 name(A)
rect(l4 (725 2860) (250 1940))
rect(l4 (-325 -1850) (300 300))
rect(l4 (-225 1550) (250 2000))
rect(l4 (-250 -2000) (250 2000))
rect(l4 (-250 -5390) (250 1450))
rect(l8 (-265 150) (180 180))
rect(l11 (-91 -91) (2 2))
rect(l11 (-151 -151) (300 300))
)
net(7 name(SUBSTRATE))
net(8
rect(l6 (975 1660) (425 950))
rect(l6 (-400 -950) (425 950))
)
# Outgoing pins and their connections to nets
pin(1 name(VDD))
pin(2 name(OUT))
pin(3 name(VSS))
pin(4)
pin(5 name(B))
pin(6 name(A))
pin(7 name(SUBSTRATE))
# Devices and their connections
device(1 D$PMOS
location(850 5800)
param(L 0.5)
param(W 3)
param(AS 2.55)
param(AD 1.35)
param(PS 7.7)
param(PD 3.9)
terminal(S 2)
terminal(G 6)
terminal(D 1)
terminal(B 4)
)
device(2 D$PMOS$1
location(1550 5800)
param(L 0.5)
param(W 3)
param(AS 1.35)
param(AD 2.55)
param(PS 3.9)
param(PD 7.7)
terminal(S 1)
terminal(G 5)
terminal(D 2)
terminal(B 4)
)
device(3 D$NMOS
location(850 2135)
param(L 0.5)
param(W 1.9)
param(AS 1.615)
param(AD 0.855)
param(PS 5.5)
param(PD 2.8)
terminal(S 3)
terminal(G 6)
terminal(D 8)
terminal(B 7)
)
device(4 D$NMOS$1
location(1550 2135)
param(L 0.5)
param(W 1.9)
param(AS 0.855)
param(AD 1.615)
param(PS 2.8)
param(PD 5.5)
terminal(S 8)
terminal(G 5)
terminal(D 2)
terminal(B 7)
)
)
circuit(INVX1
# Circuit boundary
rect((-100 400) (2000 7600))
# Nets with their geometries
net(1 name(VDD)
rect(l8 (410 6260) (180 180))
rect(l8 (-180 -730) (180 180))
rect(l8 (-180 -730) (180 180))
rect(l11 (-240 -240) (300 1400))
rect(l11 (-650 300) (1800 800))
rect(l11 (-1450 -1100) (300 300))
rect(l11 (299 399) (2 2))
rect(l2 (-651 -2151) (425 1500))
)
net(2 name(OUT)
rect(l8 (1110 5160) (180 180))
rect(l8 (-180 920) (180 180))
rect(l8 (-180 -730) (180 180))
rect(l8 (-180 -4120) (180 180))
rect(l8 (-180 370) (180 180))
rect(l11 (-240 -790) (300 4790))
rect(l11 (-151 -2501) (2 2))
rect(l2 (-226 1049) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
rect(l8 (-180 370) (180 180))
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (1800 800))
rect(l11 (-851 -401) (2 2))
rect(l6 (-651 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2000 3500))
)
net(5 name(IN)
rect(l4 (725 2860) (250 1940))
rect(l4 (-525 -1850) (300 300))
rect(l4 (-25 1550) (250 2000))
rect(l4 (-250 -2000) (250 2000))
rect(l4 (-250 -5390) (250 1450))
rect(l8 (-465 150) (180 180))
rect(l11 (-91 -91) (2 2))
rect(l11 (-151 -151) (300 300))
)
net(6 name(SUBSTRATE))
# Outgoing pins and their connections to nets
pin(1 name(VDD))
pin(2 name(OUT))
pin(3 name(VSS))
pin(4)
pin(5 name(IN))
pin(6 name(SUBSTRATE))
# Devices and their connections
device(1 D$PMOS$2
location(850 5800)
param(L 0.5)
param(W 3)
param(AS 2.55)
param(AD 2.55)
param(PS 7.7)
param(PD 7.7)
terminal(S 1)
terminal(G 5)
terminal(D 2)
terminal(B 4)
)
device(2 D$NMOS$2
location(850 2135)
param(L 0.5)
param(W 1.9)
param(AS 1.615)
param(AD 1.615)
param(PS 5.5)
param(PD 5.5)
terminal(S 3)
terminal(G 5)
terminal(D 2)
terminal(B 6)
)
)
circuit(RINGO
# Circuit boundary
rect((0 350) (25800 7650))
# Nets with their geometries
net(1
rect(l8 (4710 3010) (180 180))
rect(l11 (-850 -240) (610 300))
rect(l2 (-1175 1800) (425 1500))
rect(l2 (-1800 -1500) (425 1500))
rect(l6 (950 -4890) (425 950))
)
net(2
rect(l8 (6510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3
rect(l8 (8310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(4
rect(l8 (10110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(5
rect(l8 (11910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(6
rect(l8 (13710 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(7
rect(l8 (15510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(8
rect(l8 (17310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(9
rect(l8 (19110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(10
rect(l8 (20910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(11 name(FB)
rect(l8 (22710 3010) (180 180))
rect(l8 (-19700 720) (180 180))
rect(l11 (18380 -1140) (900 300))
rect(l11 (-19530 590) (320 320))
rect(l11 (17820 -320) (320 320))
rect(l12 (-18400 -260) (200 200))
rect(l12 (17940 -200) (200 200))
rect(l13 (-18040 -300) (17740 400))
rect(l13 (-17921 -201) (2 2))
rect(l13 (-221 -201) (400 400))
rect(l13 (17740 -400) (400 400))
rect(l2 (-245 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(12 name(VDD)
rect(l3 (500 4500) (1400 3500))
rect(l3 (-1900 -3500) (600 3500))
rect(l3 (23300 -3500) (1400 3500))
rect(l3 (-100 -3500) (600 3500))
rect(l8 (-24690 -1240) (180 180))
rect(l8 (-180 370) (180 180))
rect(l8 (-180 -1280) (180 180))
rect(l8 (23220 370) (180 180))
rect(l8 (-180 370) (180 180))
rect(l8 (-180 -1280) (180 180))
rect(l11 (-21741 859) (2 2))
rect(l11 (-2351 -451) (1200 800))
rect(l11 (-750 -1450) (300 1400))
rect(l11 (-101 -351) (2 2))
rect(l11 (-1251 -401) (600 800))
rect(l11 (23400 -800) (1200 800))
rect(l11 (-750 -1450) (300 1400))
rect(l11 (-101 -351) (2 2))
rect(l11 (549 -401) (600 800))
rect(l2 (-23025 -2550) (425 1500))
rect(l2 (-400 -1500) (425 1500))
rect(l2 (1275 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l9 (-21975 -450) (500 1500))
rect(l9 (22900 -1500) (500 1500))
)
net(13 name(OUT)
rect(l11 (23440 3840) (320 320))
rect(l12 (-260 -260) (200 200))
rect(l13 (-101 -101) (2 2))
rect(l13 (-201 -201) (400 400))
rect(l2 (-625 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(14 name(ENABLE)
rect(l8 (2510 3010) (180 180))
rect(l11 (-250 -250) (320 320))
rect(l12 (-260 -260) (200 200))
rect(l13 (-101 -101) (2 2))
rect(l13 (-201 -201) (400 400))
)
net(15 name(VSS)
rect(l8 (1110 1610) (180 180))
rect(l8 (-180 -1280) (180 180))
rect(l8 (-180 370) (180 180))
rect(l8 (23220 370) (180 180))
rect(l8 (-180 -1280) (180 180))
rect(l8 (-180 370) (180 180))
rect(l11 (-21741 -391) (2 2))
rect(l11 (-1901 -401) (300 1400))
rect(l11 (-750 -1450) (1200 800))
rect(l11 (-551 -401) (2 2))
rect(l11 (-1251 -401) (600 800))
rect(l11 (23850 -750) (300 1400))
rect(l11 (-750 -1450) (1200 800))
rect(l11 (-551 -401) (2 2))
rect(l11 (549 -401) (600 800))
rect(l6 (-23700 460) (425 950))
rect(l6 (1975 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l10 (-21975 -2210) (500 1500))
rect(l10 (22900 -1500) (500 1500))
)
# Outgoing pins and their connections to nets
pin(11 name(FB))
pin(12 name(VDD))
pin(13 name(OUT))
pin(14 name(ENABLE))
pin(15 name(VSS))
# Subcircuits and their connections
circuit(1 ND2X1 location(1800 0)
pin(0 12)
pin(1 1)
pin(2 15)
pin(3 12)
pin(4 11)
pin(5 14)
pin(6 15)
)
circuit(2 INVX1 location(4200 0)
pin(0 12)
pin(1 2)
pin(2 15)
pin(3 12)
pin(4 1)
pin(5 15)
)
circuit(3 INVX1 location(6000 0)
pin(0 12)
pin(1 3)
pin(2 15)
pin(3 12)
pin(4 2)
pin(5 15)
)
circuit(4 INVX1 location(7800 0)
pin(0 12)
pin(1 4)
pin(2 15)
pin(3 12)
pin(4 3)
pin(5 15)
)
circuit(5 INVX1 location(9600 0)
pin(0 12)
pin(1 5)
pin(2 15)
pin(3 12)
pin(4 4)
pin(5 15)
)
circuit(6 INVX1 location(11400 0)
pin(0 12)
pin(1 6)
pin(2 15)
pin(3 12)
pin(4 5)
pin(5 15)
)
circuit(7 INVX1 location(13200 0)
pin(0 12)
pin(1 7)
pin(2 15)
pin(3 12)
pin(4 6)
pin(5 15)
)
circuit(8 INVX1 location(15000 0)
pin(0 12)
pin(1 8)
pin(2 15)
pin(3 12)
pin(4 7)
pin(5 15)
)
circuit(9 INVX1 location(16800 0)
pin(0 12)
pin(1 9)
pin(2 15)
pin(3 12)
pin(4 8)
pin(5 15)
)
circuit(10 INVX1 location(18600 0)
pin(0 12)
pin(1 10)
pin(2 15)
pin(3 12)
pin(4 9)
pin(5 15)
)
circuit(11 INVX1 location(20400 0)
pin(0 12)
pin(1 11)
pin(2 15)
pin(3 12)
pin(4 10)
pin(5 15)
)
circuit(12 INVX1 location(22200 0)
pin(0 12)
pin(1 13)
pin(2 15)
pin(3 12)
pin(4 11)
pin(5 15)
)
)
)
# Reference netlist
reference(
# Device class section
class(PMOS MOS4)
class(NMOS MOS4)
# Circuit section
# Circuits are the hierarchical building blocks of the netlist.
circuit(ND2X1
# Nets
net(1 name(VDD))
net(2 name(OUT))
net(3 name(VSS))
net(4 name(NWELL))
net(5 name(B))
net(6 name(A))
net(7 name(BULK))
net(8 name('1'))
# Outgoing pins and their connections to nets
pin(1 name(VDD))
pin(2 name(OUT))
pin(3 name(VSS))
pin(4 name(NWELL))
pin(5 name(B))
pin(6 name(A))
pin(7 name(BULK))
# Devices and their connections
device(1 PMOS
name($1)
param(L 0.5)
param(W 3)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 2)
terminal(G 6)
terminal(D 1)
terminal(B 4)
)
device(2 PMOS
name($2)
param(L 0.5)
param(W 3)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 1)
terminal(G 5)
terminal(D 2)
terminal(B 4)
)
device(3 NMOS
name($3)
param(L 0.5)
param(W 1.9)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 3)
terminal(G 6)
terminal(D 8)
terminal(B 7)
)
device(4 NMOS
name($4)
param(L 0.5)
param(W 1.9)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 8)
terminal(G 5)
terminal(D 2)
terminal(B 7)
)
)
circuit(INVX1
# Nets
net(1 name(VDD))
net(2 name(OUT))
net(3 name(VSS))
net(4 name(NWELL))
net(5 name(IN))
net(6 name(BULK))
# Outgoing pins and their connections to nets
pin(1 name(VDD))
pin(2 name(OUT))
pin(3 name(VSS))
pin(4 name(NWELL))
pin(5 name(IN))
pin(6 name(BULK))
# Devices and their connections
device(1 PMOS
name($1)
param(L 0.5)
param(W 3)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 1)
terminal(G 5)
terminal(D 2)
terminal(B 4)
)
device(2 NMOS
name($2)
param(L 0.5)
param(W 1.9)
param(AS 0)
param(AD 0)
param(PS 0)
param(PD 0)
terminal(S 3)
terminal(G 5)
terminal(D 2)
terminal(B 6)
)
)
circuit(RINGO
# Nets
net(1 name(VSS))
net(2 name(VDD))
net(3 name(FB))
net(4 name(ENABLE))
net(5 name(OUT))
net(6 name('1'))
net(7 name('2'))
net(8 name('3'))
net(9 name('4'))
net(10 name('5'))
net(11 name('6'))
net(12 name('7'))
net(13 name('8'))
net(14 name('9'))
net(15 name('10'))
# Outgoing pins and their connections to nets
pin(1 name(VSS))
pin(2 name(VDD))
pin(3 name(FB))
pin(4 name(ENABLE))
pin(5 name(OUT))
# Subcircuits and their connections
circuit(1 ND2X1 name($1)
pin(0 2)
pin(1 6)
pin(2 1)
pin(3 2)
pin(4 3)
pin(5 4)
pin(6 1)
)
circuit(2 INVX1 name($2)
pin(0 2)
pin(1 7)
pin(2 1)
pin(3 2)
pin(4 6)
pin(5 1)
)
circuit(3 INVX1 name($3)
pin(0 2)
pin(1 8)
pin(2 1)
pin(3 2)
pin(4 7)
pin(5 1)
)
circuit(4 INVX1 name($4)
pin(0 2)
pin(1 9)
pin(2 1)
pin(3 2)
pin(4 8)
pin(5 1)
)
circuit(5 INVX1 name($5)
pin(0 2)
pin(1 10)
pin(2 1)
pin(3 2)
pin(4 9)
pin(5 1)
)
circuit(6 INVX1 name($6)
pin(0 2)
pin(1 11)
pin(2 1)
pin(3 2)
pin(4 10)
pin(5 1)
)
circuit(7 INVX1 name($7)
pin(0 2)
pin(1 12)
pin(2 1)
pin(3 2)
pin(4 11)
pin(5 1)
)
circuit(8 INVX1 name($8)
pin(0 2)
pin(1 13)
pin(2 1)
pin(3 2)
pin(4 12)
pin(5 1)
)
circuit(9 INVX1 name($9)
pin(0 2)
pin(1 14)
pin(2 1)
pin(3 2)
pin(4 13)
pin(5 1)
)
circuit(10 INVX1 name($10)
pin(0 2)
pin(1 15)
pin(2 1)
pin(3 2)
pin(4 14)
pin(5 1)
)
circuit(11 INVX1 name($11)
pin(0 2)
pin(1 3)
pin(2 1)
pin(3 2)
pin(4 15)
pin(5 1)
)
circuit(12 INVX1 name($12)
pin(0 2)
pin(1 5)
pin(2 1)
pin(3 2)
pin(4 3)
pin(5 1)
)
)
)
# Cross reference
xref(
circuit(INVX1 INVX1 match
xref(
net(4 4 match)
net(5 5 match)
net(2 2 match)
net(6 6 match)
net(1 1 match)
net(3 3 match)
pin(3 3 match)
pin(4 4 match)
pin(1 1 match)
pin(5 5 match)
pin(0 0 match)
pin(2 2 match)
device(2 2 match)
device(1 1 match)
)
)
circuit(ND2X1 ND2X1 match
xref(
net(8 8 match)
net(4 4 match)
net(6 6 match)
net(5 5 match)
net(2 2 match)
net(7 7 match)
net(1 1 match)
net(3 3 match)
pin(3 3 match)
pin(5 5 match)
pin(4 4 match)
pin(1 1 match)
pin(6 6 match)
pin(0 0 match)
pin(2 2 match)
device(3 3 match)
device(4 4 match)
device(1 1 match)
device(2 2 match)
)
)
circuit(RINGO RINGO match
xref(
net(1 6 match)
net(10 15 match)
net(2 7 match)
net(3 8 match)
net(4 9 match)
net(5 10 match)
net(6 11 match)
net(7 12 match)
net(8 13 match)
net(9 14 match)
net(14 4 match)
net(11 3 match)
net(13 5 match)
net(12 2 match)
net(15 1 match)
pin(3 3 match)
pin(0 2 match)
pin(2 4 match)
pin(1 1 match)
pin(4 0 match)
circuit(2 2 match)
circuit(3 3 match)
circuit(4 4 match)
circuit(5 5 match)
circuit(6 6 match)
circuit(7 7 match)
circuit(8 8 match)
circuit(9 9 match)
circuit(10 10 match)
circuit(11 11 match)
circuit(12 12 match)
circuit(1 1 match)
)
)
)
testdata/lvs/ringo_simple_implicit_connections.lvsdb.1
Vendored
+86 -86
View File
@@ -16,22 +16,22 @@ layout(
layer(l12 '10/0')
layer(l13 '11/0')
layer(l7)
layer(l1)
layer(l2)
layer(l9)
layer(l5)
layer(l6)
layer(l10)
# Mask layer connectivity
connect(l3 l3 l9)
connect(l4 l4 l8)
connect(l8 l4 l8 l11 l1 l9 l5 l10)
connect(l8 l4 l8 l11 l2 l9 l6 l10)
connect(l11 l8 l11 l12)
connect(l12 l11 l12 l13)
connect(l13 l12 l13)
connect(l7 l7)
connect(l1 l8 l1)
connect(l2 l8 l2)
connect(l9 l3 l8 l9)
connect(l5 l8 l5)
connect(l6 l8 l6)
connect(l10 l8 l10)
# Global nets and connectivity
@@ -46,13 +46,13 @@ layout(
# Device abstracts list the pin shapes of the devices.
device(D$PMOS PMOS
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (450 1500))
rect(l2 (125 -750) (450 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -60,13 +60,13 @@ layout(
)
device(D$PMOS$1 PMOS
terminal(S
rect(l1 (-575 -750) (450 1500))
rect(l2 (-575 -750) (450 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -74,13 +74,13 @@ layout(
)
device(D$PMOS$2 PMOS
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -88,13 +88,13 @@ layout(
)
device(D$NMOS NMOS
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (450 950))
rect(l6 (125 -475) (450 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -102,13 +102,13 @@ layout(
)
device(D$NMOS$1 NMOS
terminal(S
rect(l5 (-575 -475) (450 950))
rect(l6 (-575 -475) (450 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -116,13 +116,13 @@ layout(
)
device(D$NMOS$2 NMOS
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -144,8 +144,8 @@ layout(
rect(l11 (-240 -790) (300 1700))
rect(l11 (-1350 0) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l1 (-276 -2151) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l2 (-276 -2151) (425 1500))
rect(l2 (-400 -1500) (425 1500))
)
net(2 name(OUT)
rect(l8 (1810 1770) (180 180))
@@ -163,9 +163,9 @@ layout(
rect(l11 (-1751 1099) (300 1400))
rect(l11 (1100 -1700) (300 300))
rect(l11 (-300 0) (300 1400))
rect(l1 (-1750 -1450) (425 1500))
rect(l1 (950 -1500) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1750 -1450) (425 1500))
rect(l2 (950 -1500) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -173,7 +173,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l5 (-951 859) (425 950))
rect(l6 (-951 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2600 3500))
@@ -200,8 +200,8 @@ layout(
)
net(7 name(SUBSTRATE))
net(8
rect(l5 (975 1660) (425 950))
rect(l5 (-400 -950) (425 950))
rect(l6 (975 1660) (425 950))
rect(l6 (-400 -950) (425 950))
)
# Outgoing pins and their connections to nets
@@ -282,7 +282,7 @@ layout(
rect(l11 (-650 300) (1800 800))
rect(l11 (-1450 -1100) (300 300))
rect(l11 (299 399) (2 2))
rect(l1 (-651 -2151) (425 1500))
rect(l2 (-651 -2151) (425 1500))
)
net(2 name(OUT)
rect(l8 (1110 5160) (180 180))
@@ -292,8 +292,8 @@ layout(
rect(l8 (-180 370) (180 180))
rect(l11 (-240 -790) (300 4790))
rect(l11 (-151 -2501) (2 2))
rect(l1 (-226 1049) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-226 1049) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -301,7 +301,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (1800 800))
rect(l11 (-851 -401) (2 2))
rect(l5 (-651 859) (425 950))
rect(l6 (-651 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2000 3500))
@@ -364,63 +364,63 @@ layout(
net(1
rect(l8 (5210 3010) (180 180))
rect(l11 (-1350 -240) (1160 300))
rect(l1 (-3100 1800) (425 1500))
rect(l1 (950 -1500) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-3100 1800) (425 1500))
rect(l2 (950 -1500) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(2
rect(l8 (7010 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3
rect(l8 (8810 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(4
rect(l8 (10610 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(5
rect(l8 (12410 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(6
rect(l8 (14210 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(7
rect(l8 (16010 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(8
rect(l8 (17810 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(9
rect(l8 (19610 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(10
rect(l8 (21410 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(11 name(FB)
rect(l8 (25210 3010) (180 180))
@@ -434,8 +434,8 @@ layout(
rect(l13 (-19071 -201) (2 2))
rect(l13 (-171 -201) (400 400))
rect(l13 (18490 -400) (400 400))
rect(l1 (-545 850) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-545 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(12 name(VDD)
rect(l3 (22600 4500) (1400 3500))
@@ -466,19 +466,19 @@ layout(
rect(l11 (-750 -1450) (300 1400))
rect(l11 (-101 -351) (2 2))
rect(l11 (549 -401) (600 800))
rect(l1 (-23300 -2550) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (-18850 -1500) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l1 (21775 -1500) (425 1500))
rect(l2 (-23300 -2550) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (-18850 -1500) (425 1500))
rect(l2 (-400 -1500) (425 1500))
rect(l2 (21775 -1500) (425 1500))
rect(l9 (-2375 -450) (500 1500))
rect(l9 (-22600 -1500) (500 1500))
rect(l9 (25400 -1500) (500 1500))
@@ -488,8 +488,8 @@ layout(
rect(l12 (-260 -260) (200 200))
rect(l13 (-151 -101) (2 2))
rect(l13 (-151 -201) (400 400))
rect(l1 (-675 850) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-675 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(14 name(ENABLE)
rect(l8 (2510 3010) (180 180))
@@ -522,18 +522,18 @@ layout(
rect(l11 (-750 -1450) (1200 800))
rect(l11 (-551 -401) (2 2))
rect(l11 (-1251 -401) (600 800))
rect(l5 (24400 460) (425 950))
rect(l5 (-20425 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (-19525 -950) (425 950))
rect(l6 (24400 460) (425 950))
rect(l6 (-20425 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (-19525 -950) (425 950))
rect(l10 (24325 -2210) (500 1500))
rect(l10 (-4300 -1500) (500 1500))
rect(l10 (-22600 -1500) (500 1500))
@@ -924,8 +924,8 @@ xref(
pin(5 5 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(1 1 match)
)
)
circuit(ND2X1 ND2X1 match
@@ -945,10 +945,10 @@ xref(
pin(6 6 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(3 3 match)
device(4 4 match)
device(1 1 match)
device(2 2 match)
)
)
circuit(RINGO RINGO match
@@ -973,10 +973,6 @@ xref(
pin(2 4 match)
pin(1 1 match)
pin(4 0 match)
circuit(1 1 match)
circuit(10 10 match)
circuit(11 11 match)
circuit(12 12 match)
circuit(2 2 match)
circuit(3 3 match)
circuit(4 4 match)
@@ -985,6 +981,10 @@ xref(
circuit(7 7 match)
circuit(8 8 match)
circuit(9 9 match)
circuit(10 10 match)
circuit(11 11 match)
circuit(12 12 match)
circuit(1 1 match)
)
)
)
testdata/lvs/ringo_simple_implicit_connections.lvsdb.2
Vendored
+86 -86
View File
@@ -16,22 +16,22 @@ layout(
layer(l12 '10/0')
layer(l13 '11/0')
layer(l7)
layer(l1)
layer(l2)
layer(l9)
layer(l5)
layer(l6)
layer(l10)
# Mask layer connectivity
connect(l3 l3 l9)
connect(l4 l4 l8)
connect(l8 l4 l8 l11 l1 l9 l5 l10)
connect(l8 l4 l8 l11 l2 l9 l6 l10)
connect(l11 l8 l11 l12)
connect(l12 l11 l12 l13)
connect(l13 l12 l13)
connect(l7 l7)
connect(l1 l8 l1)
connect(l2 l8 l2)
connect(l9 l3 l8 l9)
connect(l5 l8 l5)
connect(l6 l8 l6)
connect(l10 l8 l10)
# Global nets and connectivity
@@ -46,13 +46,13 @@ layout(
# Device abstracts list the pin shapes of the devices.
device(D$PMOS PMOS
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (450 1500))
rect(l2 (125 -750) (450 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -60,13 +60,13 @@ layout(
)
device(D$PMOS$1 PMOS
terminal(S
rect(l1 (-575 -750) (450 1500))
rect(l2 (-575 -750) (450 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -74,13 +74,13 @@ layout(
)
device(D$PMOS$2 PMOS
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -88,13 +88,13 @@ layout(
)
device(D$NMOS NMOS
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (450 950))
rect(l6 (125 -475) (450 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -102,13 +102,13 @@ layout(
)
device(D$NMOS$1 NMOS
terminal(S
rect(l5 (-575 -475) (450 950))
rect(l6 (-575 -475) (450 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -116,13 +116,13 @@ layout(
)
device(D$NMOS$2 NMOS
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -144,8 +144,8 @@ layout(
rect(l11 (-240 -790) (300 1700))
rect(l11 (-1350 0) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l1 (-276 -2151) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l2 (-276 -2151) (425 1500))
rect(l2 (-400 -1500) (425 1500))
)
net(2 name(OUT)
rect(l8 (1810 1770) (180 180))
@@ -163,9 +163,9 @@ layout(
rect(l11 (-1751 1099) (300 1400))
rect(l11 (1100 -1700) (300 300))
rect(l11 (-300 0) (300 1400))
rect(l1 (-375 -1450) (425 1500))
rect(l1 (-1800 -1500) (425 1500))
rect(l5 (950 -4890) (425 950))
rect(l2 (-375 -1450) (425 1500))
rect(l2 (-1800 -1500) (425 1500))
rect(l6 (950 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -173,7 +173,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l5 (-951 859) (425 950))
rect(l6 (-951 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2600 3500))
@@ -200,8 +200,8 @@ layout(
)
net(7 name(SUBSTRATE))
net(8
rect(l5 (975 1660) (425 950))
rect(l5 (-400 -950) (425 950))
rect(l6 (975 1660) (425 950))
rect(l6 (-400 -950) (425 950))
)
# Outgoing pins and their connections to nets
@@ -282,7 +282,7 @@ layout(
rect(l11 (-650 300) (1800 800))
rect(l11 (-1450 -1100) (300 300))
rect(l11 (299 399) (2 2))
rect(l1 (-651 -2151) (425 1500))
rect(l2 (-651 -2151) (425 1500))
)
net(2 name(OUT)
rect(l8 (1110 5160) (180 180))
@@ -292,8 +292,8 @@ layout(
rect(l8 (-180 370) (180 180))
rect(l11 (-240 -790) (300 4790))
rect(l11 (-151 -2501) (2 2))
rect(l1 (-226 1049) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-226 1049) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -301,7 +301,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (1800 800))
rect(l11 (-851 -401) (2 2))
rect(l5 (-651 859) (425 950))
rect(l6 (-651 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2000 3500))
@@ -364,63 +364,63 @@ layout(
net(1
rect(l8 (5210 3010) (180 180))
rect(l11 (-1350 -240) (1160 300))
rect(l1 (-1725 1800) (425 1500))
rect(l1 (-1800 -1500) (425 1500))
rect(l5 (950 -4890) (425 950))
rect(l2 (-1725 1800) (425 1500))
rect(l2 (-1800 -1500) (425 1500))
rect(l6 (950 -4890) (425 950))
)
net(2
rect(l8 (7010 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3
rect(l8 (8810 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(4
rect(l8 (10610 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(5
rect(l8 (12410 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(6
rect(l8 (14210 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(7
rect(l8 (16010 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(8
rect(l8 (17810 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(9
rect(l8 (19610 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(10
rect(l8 (21410 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(11 name(FB)
rect(l8 (25210 3010) (180 180))
@@ -434,8 +434,8 @@ layout(
rect(l13 (-19071 -201) (2 2))
rect(l13 (-171 -201) (400 400))
rect(l13 (18490 -400) (400 400))
rect(l1 (-545 850) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-545 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(12 name(VDD)
rect(l3 (22600 4500) (1400 3500))
@@ -466,19 +466,19 @@ layout(
rect(l11 (-750 -1450) (300 1400))
rect(l11 (-101 -351) (2 2))
rect(l11 (549 -401) (600 800))
rect(l1 (-23300 -2550) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (-18850 -1500) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l1 (21775 -1500) (425 1500))
rect(l2 (-23300 -2550) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (-18850 -1500) (425 1500))
rect(l2 (-400 -1500) (425 1500))
rect(l2 (21775 -1500) (425 1500))
rect(l9 (-2375 -450) (500 1500))
rect(l9 (-22600 -1500) (500 1500))
rect(l9 (25400 -1500) (500 1500))
@@ -488,8 +488,8 @@ layout(
rect(l12 (-260 -260) (200 200))
rect(l13 (-151 -101) (2 2))
rect(l13 (-151 -201) (400 400))
rect(l1 (-675 850) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-675 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(14 name(ENABLE)
rect(l8 (2510 3010) (180 180))
@@ -522,18 +522,18 @@ layout(
rect(l11 (-750 -1450) (1200 800))
rect(l11 (-551 -401) (2 2))
rect(l11 (-1251 -401) (600 800))
rect(l5 (24400 460) (425 950))
rect(l5 (-20425 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (-19525 -950) (425 950))
rect(l6 (24400 460) (425 950))
rect(l6 (-20425 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (-19525 -950) (425 950))
rect(l10 (24325 -2210) (500 1500))
rect(l10 (-4300 -1500) (500 1500))
rect(l10 (-22600 -1500) (500 1500))
@@ -924,8 +924,8 @@ xref(
pin(5 5 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(1 1 match)
)
)
circuit(ND2X1 ND2X1 match
@@ -945,10 +945,10 @@ xref(
pin(6 6 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(3 3 match)
device(4 4 match)
device(1 1 match)
device(2 2 match)
)
)
circuit(RINGO RINGO match
@@ -973,10 +973,6 @@ xref(
pin(2 4 match)
pin(1 1 match)
pin(4 0 match)
circuit(1 1 match)
circuit(10 10 match)
circuit(11 11 match)
circuit(12 12 match)
circuit(2 2 match)
circuit(3 3 match)
circuit(4 4 match)
@@ -985,6 +981,10 @@ xref(
circuit(7 7 match)
circuit(8 8 match)
circuit(9 9 match)
circuit(10 10 match)
circuit(11 11 match)
circuit(12 12 match)
circuit(1 1 match)
)
)
)
testdata/lvs/ringo_simple_io.lvsdb.1
Vendored
+86 -86
View File
@@ -9,32 +9,32 @@ J(
L(l12 '10/0')
L(l13 '11/0')
L(l7)
L(l1)
L(l2)
L(l9)
L(l5)
L(l6)
L(l10)
C(l3 l3 l9)
C(l4 l4 l8)
C(l8 l4 l8 l11 l1 l9 l5 l10)
C(l8 l4 l8 l11 l2 l9 l6 l10)
C(l11 l8 l11 l12)
C(l12 l11 l12 l13)
C(l13 l12 l13)
C(l7 l7)
C(l1 l8 l1)
C(l2 l8 l2)
C(l9 l3 l8 l9)
C(l5 l8 l5)
C(l6 l8 l6)
C(l10 l8 l10)
G(l7 SUBSTRATE)
G(l10 SUBSTRATE)
D(D$PMOS PMOS
T(S
R(l1 (-550 -750) (425 1500))
R(l2 (-550 -750) (425 1500))
)
T(G
R(l4 (-125 -750) (250 1500))
)
T(D
R(l1 (125 -750) (450 1500))
R(l2 (125 -750) (450 1500))
)
T(B
R(l3 (-125 -750) (250 1500))
@@ -42,13 +42,13 @@ J(
)
D(D$PMOS$1 PMOS
T(S
R(l1 (-575 -750) (450 1500))
R(l2 (-575 -750) (450 1500))
)
T(G
R(l4 (-125 -750) (250 1500))
)
T(D
R(l1 (125 -750) (425 1500))
R(l2 (125 -750) (425 1500))
)
T(B
R(l3 (-125 -750) (250 1500))
@@ -56,13 +56,13 @@ J(
)
D(D$PMOS$2 PMOS
T(S
R(l1 (-550 -750) (425 1500))
R(l2 (-550 -750) (425 1500))
)
T(G
R(l4 (-125 -750) (250 1500))
)
T(D
R(l1 (125 -750) (425 1500))
R(l2 (125 -750) (425 1500))
)
T(B
R(l3 (-125 -750) (250 1500))
@@ -70,13 +70,13 @@ J(
)
D(D$NMOS NMOS
T(S
R(l5 (-550 -475) (425 950))
R(l6 (-550 -475) (425 950))
)
T(G
R(l4 (-125 -475) (250 950))
)
T(D
R(l5 (125 -475) (450 950))
R(l6 (125 -475) (450 950))
)
T(B
R(l7 (-125 -475) (250 950))
@@ -84,13 +84,13 @@ J(
)
D(D$NMOS$1 NMOS
T(S
R(l5 (-575 -475) (450 950))
R(l6 (-575 -475) (450 950))
)
T(G
R(l4 (-125 -475) (250 950))
)
T(D
R(l5 (125 -475) (425 950))
R(l6 (125 -475) (425 950))
)
T(B
R(l7 (-125 -475) (250 950))
@@ -98,13 +98,13 @@ J(
)
D(D$NMOS$2 NMOS
T(S
R(l5 (-550 -475) (425 950))
R(l6 (-550 -475) (425 950))
)
T(G
R(l4 (-125 -475) (250 950))
)
T(D
R(l5 (125 -475) (425 950))
R(l6 (125 -475) (425 950))
)
T(B
R(l7 (-125 -475) (250 950))
@@ -119,8 +119,8 @@ J(
R(l11 (-240 -790) (300 1700))
R(l11 (-1350 0) (2400 800))
R(l11 (-1151 -401) (2 2))
R(l1 (-276 -2151) (425 1500))
R(l1 (-400 -1500) (425 1500))
R(l2 (-276 -2151) (425 1500))
R(l2 (-400 -1500) (425 1500))
)
N(2 I(OUT)
R(l8 (1810 1770) (180 180))
@@ -138,9 +138,9 @@ J(
R(l11 (-1751 1099) (300 1400))
R(l11 (1100 -1700) (300 300))
R(l11 (-300 0) (300 1400))
R(l1 (-1750 -1450) (425 1500))
R(l1 (950 -1500) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1750 -1450) (425 1500))
R(l2 (950 -1500) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(3 I(VSS)
R(l8 (410 1770) (180 180))
@@ -148,7 +148,7 @@ J(
R(l11 (-240 -1300) (300 1360))
R(l11 (-650 -2160) (2400 800))
R(l11 (-1151 -401) (2 2))
R(l5 (-951 859) (425 950))
R(l6 (-951 859) (425 950))
)
N(4
R(l3 (-100 4500) (2600 3500))
@@ -175,8 +175,8 @@ J(
)
N(7 I(SUBSTRATE))
N(8
R(l5 (975 1660) (425 950))
R(l5 (-400 -950) (425 950))
R(l6 (975 1660) (425 950))
R(l6 (-400 -950) (425 950))
)
P(1 I(VDD))
P(2 I(OUT))
@@ -248,7 +248,7 @@ J(
R(l11 (-650 300) (1800 800))
R(l11 (-1450 -1100) (300 300))
R(l11 (299 399) (2 2))
R(l1 (-651 -2151) (425 1500))
R(l2 (-651 -2151) (425 1500))
)
N(2 I(OUT)
R(l8 (1110 5160) (180 180))
@@ -258,8 +258,8 @@ J(
R(l8 (-180 370) (180 180))
R(l11 (-240 -790) (300 4790))
R(l11 (-151 -2501) (2 2))
R(l1 (-226 1049) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-226 1049) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(3 I(VSS)
R(l8 (410 1770) (180 180))
@@ -267,7 +267,7 @@ J(
R(l11 (-240 -1300) (300 1360))
R(l11 (-650 -2160) (1800 800))
R(l11 (-851 -401) (2 2))
R(l5 (-651 859) (425 950))
R(l6 (-651 859) (425 950))
)
N(4
R(l3 (-100 4500) (2000 3500))
@@ -321,63 +321,63 @@ J(
N(1
R(l8 (4710 3010) (180 180))
R(l11 (-850 -240) (610 300))
R(l1 (-2550 1800) (425 1500))
R(l1 (950 -1500) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-2550 1800) (425 1500))
R(l2 (950 -1500) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(2
R(l8 (6510 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(3
R(l8 (8310 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(4
R(l8 (10110 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(5
R(l8 (11910 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(6
R(l8 (13710 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(7
R(l8 (15510 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(8
R(l8 (17310 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(9
R(l8 (19110 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(10
R(l8 (20910 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(11 I(FB)
R(l8 (22710 3010) (180 180))
@@ -391,8 +391,8 @@ J(
R(l13 (-17921 -201) (2 2))
R(l13 (-221 -201) (400 400))
R(l13 (17740 -400) (400 400))
R(l1 (-245 850) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-245 850) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(12 I(VDD)
R(l3 (500 4500) (1400 3500))
@@ -414,19 +414,19 @@ J(
R(l11 (-750 -1450) (300 1400))
R(l11 (-101 -351) (2 2))
R(l11 (549 -401) (600 800))
R(l1 (-23025 -2550) (425 1500))
R(l1 (-400 -1500) (425 1500))
R(l1 (1275 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l2 (-23025 -2550) (425 1500))
R(l2 (-400 -1500) (425 1500))
R(l2 (1275 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l9 (-21975 -450) (500 1500))
R(l9 (22900 -1500) (500 1500))
)
@@ -435,8 +435,8 @@ J(
R(l12 (-260 -260) (200 200))
R(l13 (-101 -101) (2 2))
R(l13 (-201 -201) (400 400))
R(l1 (-625 850) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-625 850) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(14 I(ENABLE)
R(l8 (2510 3010) (180 180))
@@ -461,18 +461,18 @@ J(
R(l11 (-750 -1450) (1200 800))
R(l11 (-551 -401) (2 2))
R(l11 (549 -401) (600 800))
R(l5 (-23700 460) (425 950))
R(l5 (1975 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l6 (-23700 460) (425 950))
R(l6 (1975 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l10 (-21975 -2210) (500 1500))
R(l10 (22900 -1500) (500 1500))
)
@@ -825,8 +825,8 @@ Z(
P(5 5 1)
P(0 0 1)
P(2 2 1)
D(1 1 1)
D(2 2 1)
D(1 1 1)
)
)
X(ND2X1 ND2X1 1
@@ -846,10 +846,10 @@ Z(
P(6 6 1)
P(0 0 1)
P(2 2 1)
D(1 1 1)
D(2 2 1)
D(3 3 1)
D(4 4 1)
D(1 1 1)
D(2 2 1)
)
)
X(RINGO RINGO 1
@@ -874,10 +874,6 @@ Z(
P(2 4 1)
P(1 1 1)
P(4 0 1)
X(1 1 1)
X(10 10 1)
X(11 11 1)
X(12 12 1)
X(2 2 1)
X(3 3 1)
X(4 4 1)
@@ -886,6 +882,10 @@ Z(
X(7 7 1)
X(8 8 1)
X(9 9 1)
X(10 10 1)
X(11 11 1)
X(12 12 1)
X(1 1 1)
)
)
)
testdata/lvs/ringo_simple_io.lvsdb.2
Vendored
+86 -86
View File
@@ -9,32 +9,32 @@ J(
L(l12 '10/0')
L(l13 '11/0')
L(l7)
L(l1)
L(l2)
L(l9)
L(l5)
L(l6)
L(l10)
C(l3 l3 l9)
C(l4 l4 l8)
C(l8 l4 l8 l11 l1 l9 l5 l10)
C(l8 l4 l8 l11 l2 l9 l6 l10)
C(l11 l8 l11 l12)
C(l12 l11 l12 l13)
C(l13 l12 l13)
C(l7 l7)
C(l1 l8 l1)
C(l2 l8 l2)
C(l9 l3 l8 l9)
C(l5 l8 l5)
C(l6 l8 l6)
C(l10 l8 l10)
G(l7 SUBSTRATE)
G(l10 SUBSTRATE)
D(D$PMOS PMOS
T(S
R(l1 (-550 -750) (425 1500))
R(l2 (-550 -750) (425 1500))
)
T(G
R(l4 (-125 -750) (250 1500))
)
T(D
R(l1 (125 -750) (450 1500))
R(l2 (125 -750) (450 1500))
)
T(B
R(l3 (-125 -750) (250 1500))
@@ -42,13 +42,13 @@ J(
)
D(D$PMOS$1 PMOS
T(S
R(l1 (-575 -750) (450 1500))
R(l2 (-575 -750) (450 1500))
)
T(G
R(l4 (-125 -750) (250 1500))
)
T(D
R(l1 (125 -750) (425 1500))
R(l2 (125 -750) (425 1500))
)
T(B
R(l3 (-125 -750) (250 1500))
@@ -56,13 +56,13 @@ J(
)
D(D$PMOS$2 PMOS
T(S
R(l1 (-550 -750) (425 1500))
R(l2 (-550 -750) (425 1500))
)
T(G
R(l4 (-125 -750) (250 1500))
)
T(D
R(l1 (125 -750) (425 1500))
R(l2 (125 -750) (425 1500))
)
T(B
R(l3 (-125 -750) (250 1500))
@@ -70,13 +70,13 @@ J(
)
D(D$NMOS NMOS
T(S
R(l5 (-550 -475) (425 950))
R(l6 (-550 -475) (425 950))
)
T(G
R(l4 (-125 -475) (250 950))
)
T(D
R(l5 (125 -475) (450 950))
R(l6 (125 -475) (450 950))
)
T(B
R(l7 (-125 -475) (250 950))
@@ -84,13 +84,13 @@ J(
)
D(D$NMOS$1 NMOS
T(S
R(l5 (-575 -475) (450 950))
R(l6 (-575 -475) (450 950))
)
T(G
R(l4 (-125 -475) (250 950))
)
T(D
R(l5 (125 -475) (425 950))
R(l6 (125 -475) (425 950))
)
T(B
R(l7 (-125 -475) (250 950))
@@ -98,13 +98,13 @@ J(
)
D(D$NMOS$2 NMOS
T(S
R(l5 (-550 -475) (425 950))
R(l6 (-550 -475) (425 950))
)
T(G
R(l4 (-125 -475) (250 950))
)
T(D
R(l5 (125 -475) (425 950))
R(l6 (125 -475) (425 950))
)
T(B
R(l7 (-125 -475) (250 950))
@@ -119,8 +119,8 @@ J(
R(l11 (-240 -790) (300 1700))
R(l11 (-1350 0) (2400 800))
R(l11 (-1151 -401) (2 2))
R(l1 (-276 -2151) (425 1500))
R(l1 (-400 -1500) (425 1500))
R(l2 (-276 -2151) (425 1500))
R(l2 (-400 -1500) (425 1500))
)
N(2 I(OUT)
R(l8 (1810 1770) (180 180))
@@ -138,9 +138,9 @@ J(
R(l11 (-1751 1099) (300 1400))
R(l11 (1100 -1700) (300 300))
R(l11 (-300 0) (300 1400))
R(l1 (-375 -1450) (425 1500))
R(l1 (-1800 -1500) (425 1500))
R(l5 (950 -4890) (425 950))
R(l2 (-375 -1450) (425 1500))
R(l2 (-1800 -1500) (425 1500))
R(l6 (950 -4890) (425 950))
)
N(3 I(VSS)
R(l8 (410 1770) (180 180))
@@ -148,7 +148,7 @@ J(
R(l11 (-240 -1300) (300 1360))
R(l11 (-650 -2160) (2400 800))
R(l11 (-1151 -401) (2 2))
R(l5 (-951 859) (425 950))
R(l6 (-951 859) (425 950))
)
N(4
R(l3 (-100 4500) (2600 3500))
@@ -175,8 +175,8 @@ J(
)
N(7 I(SUBSTRATE))
N(8
R(l5 (975 1660) (425 950))
R(l5 (-400 -950) (425 950))
R(l6 (975 1660) (425 950))
R(l6 (-400 -950) (425 950))
)
P(1 I(VDD))
P(2 I(OUT))
@@ -248,7 +248,7 @@ J(
R(l11 (-650 300) (1800 800))
R(l11 (-1450 -1100) (300 300))
R(l11 (299 399) (2 2))
R(l1 (-651 -2151) (425 1500))
R(l2 (-651 -2151) (425 1500))
)
N(2 I(OUT)
R(l8 (1110 5160) (180 180))
@@ -258,8 +258,8 @@ J(
R(l8 (-180 370) (180 180))
R(l11 (-240 -790) (300 4790))
R(l11 (-151 -2501) (2 2))
R(l1 (-226 1049) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-226 1049) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(3 I(VSS)
R(l8 (410 1770) (180 180))
@@ -267,7 +267,7 @@ J(
R(l11 (-240 -1300) (300 1360))
R(l11 (-650 -2160) (1800 800))
R(l11 (-851 -401) (2 2))
R(l5 (-651 859) (425 950))
R(l6 (-651 859) (425 950))
)
N(4
R(l3 (-100 4500) (2000 3500))
@@ -321,63 +321,63 @@ J(
N(1
R(l8 (4710 3010) (180 180))
R(l11 (-850 -240) (610 300))
R(l1 (-1175 1800) (425 1500))
R(l1 (-1800 -1500) (425 1500))
R(l5 (950 -4890) (425 950))
R(l2 (-1175 1800) (425 1500))
R(l2 (-1800 -1500) (425 1500))
R(l6 (950 -4890) (425 950))
)
N(2
R(l8 (6510 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(3
R(l8 (8310 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(4
R(l8 (10110 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(5
R(l8 (11910 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(6
R(l8 (13710 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(7
R(l8 (15510 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(8
R(l8 (17310 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(9
R(l8 (19110 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(10
R(l8 (20910 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(11 I(FB)
R(l8 (22710 3010) (180 180))
@@ -391,8 +391,8 @@ J(
R(l13 (-17921 -201) (2 2))
R(l13 (-221 -201) (400 400))
R(l13 (17740 -400) (400 400))
R(l1 (-245 850) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-245 850) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(12 I(VDD)
R(l3 (500 4500) (1400 3500))
@@ -414,19 +414,19 @@ J(
R(l11 (-750 -1450) (300 1400))
R(l11 (-101 -351) (2 2))
R(l11 (549 -401) (600 800))
R(l1 (-23025 -2550) (425 1500))
R(l1 (-400 -1500) (425 1500))
R(l1 (1275 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l2 (-23025 -2550) (425 1500))
R(l2 (-400 -1500) (425 1500))
R(l2 (1275 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l9 (-21975 -450) (500 1500))
R(l9 (22900 -1500) (500 1500))
)
@@ -435,8 +435,8 @@ J(
R(l12 (-260 -260) (200 200))
R(l13 (-101 -101) (2 2))
R(l13 (-201 -201) (400 400))
R(l1 (-625 850) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-625 850) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(14 I(ENABLE)
R(l8 (2510 3010) (180 180))
@@ -461,18 +461,18 @@ J(
R(l11 (-750 -1450) (1200 800))
R(l11 (-551 -401) (2 2))
R(l11 (549 -401) (600 800))
R(l5 (-23700 460) (425 950))
R(l5 (1975 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l6 (-23700 460) (425 950))
R(l6 (1975 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l10 (-21975 -2210) (500 1500))
R(l10 (22900 -1500) (500 1500))
)
@@ -825,8 +825,8 @@ Z(
P(5 5 1)
P(0 0 1)
P(2 2 1)
D(1 1 1)
D(2 2 1)
D(1 1 1)
)
)
X(ND2X1 ND2X1 1
@@ -846,10 +846,10 @@ Z(
P(6 6 1)
P(0 0 1)
P(2 2 1)
D(1 1 1)
D(2 2 1)
D(3 3 1)
D(4 4 1)
D(1 1 1)
D(2 2 1)
)
)
X(RINGO RINGO 1
@@ -874,10 +874,6 @@ Z(
P(2 4 1)
P(1 1 1)
P(4 0 1)
X(1 1 1)
X(10 10 1)
X(11 11 1)
X(12 12 1)
X(2 2 1)
X(3 3 1)
X(4 4 1)
@@ -886,6 +882,10 @@ Z(
X(7 7 1)
X(8 8 1)
X(9 9 1)
X(10 10 1)
X(11 11 1)
X(12 12 1)
X(1 1 1)
)
)
)
testdata/lvs/ringo_simple_io2.l2n.1
Vendored
+79 -79
View File
@@ -8,32 +8,32 @@ L(l11 '9/0')
L(l12 '10/0')
L(l13 '11/0')
L(l7)
L(l1)
L(l2)
L(l9)
L(l5)
L(l6)
L(l10)
C(l3 l3 l9)
C(l4 l4 l8)
C(l8 l4 l8 l11 l1 l9 l5 l10)
C(l8 l4 l8 l11 l2 l9 l6 l10)
C(l11 l8 l11 l12)
C(l12 l11 l12 l13)
C(l13 l12 l13)
C(l7 l7)
C(l1 l8 l1)
C(l2 l8 l2)
C(l9 l3 l8 l9)
C(l5 l8 l5)
C(l6 l8 l6)
C(l10 l8 l10)
G(l7 SUBSTRATE)
G(l10 SUBSTRATE)
D(D$PMOS PMOS
T(S
R(l1 (-550 -750) (425 1500))
R(l2 (-550 -750) (425 1500))
)
T(G
R(l4 (-125 -750) (250 1500))
)
T(D
R(l1 (125 -750) (450 1500))
R(l2 (125 -750) (450 1500))
)
T(B
R(l3 (-125 -750) (250 1500))
@@ -41,13 +41,13 @@ D(D$PMOS PMOS
)
D(D$PMOS$1 PMOS
T(S
R(l1 (-575 -750) (450 1500))
R(l2 (-575 -750) (450 1500))
)
T(G
R(l4 (-125 -750) (250 1500))
)
T(D
R(l1 (125 -750) (425 1500))
R(l2 (125 -750) (425 1500))
)
T(B
R(l3 (-125 -750) (250 1500))
@@ -55,13 +55,13 @@ D(D$PMOS$1 PMOS
)
D(D$PMOS$2 PMOS
T(S
R(l1 (-550 -750) (425 1500))
R(l2 (-550 -750) (425 1500))
)
T(G
R(l4 (-125 -750) (250 1500))
)
T(D
R(l1 (125 -750) (425 1500))
R(l2 (125 -750) (425 1500))
)
T(B
R(l3 (-125 -750) (250 1500))
@@ -69,13 +69,13 @@ D(D$PMOS$2 PMOS
)
D(D$NMOS NMOS
T(S
R(l5 (-550 -475) (425 950))
R(l6 (-550 -475) (425 950))
)
T(G
R(l4 (-125 -475) (250 950))
)
T(D
R(l5 (125 -475) (450 950))
R(l6 (125 -475) (450 950))
)
T(B
R(l7 (-125 -475) (250 950))
@@ -83,13 +83,13 @@ D(D$NMOS NMOS
)
D(D$NMOS$1 NMOS
T(S
R(l5 (-575 -475) (450 950))
R(l6 (-575 -475) (450 950))
)
T(G
R(l4 (-125 -475) (250 950))
)
T(D
R(l5 (125 -475) (425 950))
R(l6 (125 -475) (425 950))
)
T(B
R(l7 (-125 -475) (250 950))
@@ -97,13 +97,13 @@ D(D$NMOS$1 NMOS
)
D(D$NMOS$2 NMOS
T(S
R(l5 (-550 -475) (425 950))
R(l6 (-550 -475) (425 950))
)
T(G
R(l4 (-125 -475) (250 950))
)
T(D
R(l5 (125 -475) (425 950))
R(l6 (125 -475) (425 950))
)
T(B
R(l7 (-125 -475) (250 950))
@@ -118,8 +118,8 @@ X(ND2X1
R(l11 (-240 -790) (300 1700))
R(l11 (-1350 0) (2400 800))
R(l11 (-1151 -401) (2 2))
R(l1 (-276 -2151) (425 1500))
R(l1 (-400 -1500) (425 1500))
R(l2 (-276 -2151) (425 1500))
R(l2 (-400 -1500) (425 1500))
)
N(2 I(OUT)
R(l8 (1810 1770) (180 180))
@@ -137,9 +137,9 @@ X(ND2X1
R(l11 (-1751 1099) (300 1400))
R(l11 (1100 -1700) (300 300))
R(l11 (-300 0) (300 1400))
R(l1 (-1750 -1450) (425 1500))
R(l1 (950 -1500) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1750 -1450) (425 1500))
R(l2 (950 -1500) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(3 I(VSS)
R(l8 (410 1770) (180 180))
@@ -147,7 +147,7 @@ X(ND2X1
R(l11 (-240 -1300) (300 1360))
R(l11 (-650 -2160) (2400 800))
R(l11 (-1151 -401) (2 2))
R(l5 (-951 859) (425 950))
R(l6 (-951 859) (425 950))
)
N(4
R(l3 (-100 4500) (2600 3500))
@@ -174,8 +174,8 @@ X(ND2X1
)
N(7 I(SUBSTRATE))
N(8
R(l5 (975 1660) (425 950))
R(l5 (-400 -950) (425 950))
R(l6 (975 1660) (425 950))
R(l6 (-400 -950) (425 950))
)
P(1 I(VDD))
P(2 I(OUT))
@@ -247,7 +247,7 @@ X(INVX1
R(l11 (-650 300) (1800 800))
R(l11 (-1450 -1100) (300 300))
R(l11 (299 399) (2 2))
R(l1 (-651 -2151) (425 1500))
R(l2 (-651 -2151) (425 1500))
)
N(2 I(OUT)
R(l8 (1110 5160) (180 180))
@@ -257,8 +257,8 @@ X(INVX1
R(l8 (-180 370) (180 180))
R(l11 (-240 -790) (300 4790))
R(l11 (-151 -2501) (2 2))
R(l1 (-226 1049) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-226 1049) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(3 I(VSS)
R(l8 (410 1770) (180 180))
@@ -266,7 +266,7 @@ X(INVX1
R(l11 (-240 -1300) (300 1360))
R(l11 (-650 -2160) (1800 800))
R(l11 (-851 -401) (2 2))
R(l5 (-651 859) (425 950))
R(l6 (-651 859) (425 950))
)
N(4
R(l3 (-100 4500) (2000 3500))
@@ -320,63 +320,63 @@ X(RINGO
N(1
R(l8 (4710 3010) (180 180))
R(l11 (-850 -240) (610 300))
R(l1 (-2550 1800) (425 1500))
R(l1 (950 -1500) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-2550 1800) (425 1500))
R(l2 (950 -1500) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(2
R(l8 (6510 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(3
R(l8 (8310 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(4
R(l8 (10110 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(5
R(l8 (11910 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(6
R(l8 (13710 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(7
R(l8 (15510 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(8
R(l8 (17310 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(9
R(l8 (19110 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(10
R(l8 (20910 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(11 I(FB)
R(l8 (22710 3010) (180 180))
@@ -390,8 +390,8 @@ X(RINGO
R(l13 (-17921 -201) (2 2))
R(l13 (-221 -201) (400 400))
R(l13 (17740 -400) (400 400))
R(l1 (-245 850) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-245 850) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(12 I(VDD)
R(l3 (500 4500) (1400 3500))
@@ -413,19 +413,19 @@ X(RINGO
R(l11 (-750 -1450) (300 1400))
R(l11 (-101 -351) (2 2))
R(l11 (549 -401) (600 800))
R(l1 (-23025 -2550) (425 1500))
R(l1 (-400 -1500) (425 1500))
R(l1 (1275 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l2 (-23025 -2550) (425 1500))
R(l2 (-400 -1500) (425 1500))
R(l2 (1275 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l9 (-21975 -450) (500 1500))
R(l9 (22900 -1500) (500 1500))
)
@@ -434,8 +434,8 @@ X(RINGO
R(l12 (-260 -260) (200 200))
R(l13 (-101 -101) (2 2))
R(l13 (-201 -201) (400 400))
R(l1 (-625 850) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-625 850) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(14 I(ENABLE)
R(l8 (2510 3010) (180 180))
@@ -460,18 +460,18 @@ X(RINGO
R(l11 (-750 -1450) (1200 800))
R(l11 (-551 -401) (2 2))
R(l11 (549 -401) (600 800))
R(l5 (-23700 460) (425 950))
R(l5 (1975 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l6 (-23700 460) (425 950))
R(l6 (1975 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l10 (-21975 -2210) (500 1500))
R(l10 (22900 -1500) (500 1500))
)
testdata/lvs/ringo_simple_io2.l2n.2
Vendored
+79 -79
View File
@@ -8,32 +8,32 @@ L(l11 '9/0')
L(l12 '10/0')
L(l13 '11/0')
L(l7)
L(l1)
L(l2)
L(l9)
L(l5)
L(l6)
L(l10)
C(l3 l3 l9)
C(l4 l4 l8)
C(l8 l4 l8 l11 l1 l9 l5 l10)
C(l8 l4 l8 l11 l2 l9 l6 l10)
C(l11 l8 l11 l12)
C(l12 l11 l12 l13)
C(l13 l12 l13)
C(l7 l7)
C(l1 l8 l1)
C(l2 l8 l2)
C(l9 l3 l8 l9)
C(l5 l8 l5)
C(l6 l8 l6)
C(l10 l8 l10)
G(l7 SUBSTRATE)
G(l10 SUBSTRATE)
D(D$PMOS PMOS
T(S
R(l1 (-550 -750) (425 1500))
R(l2 (-550 -750) (425 1500))
)
T(G
R(l4 (-125 -750) (250 1500))
)
T(D
R(l1 (125 -750) (450 1500))
R(l2 (125 -750) (450 1500))
)
T(B
R(l3 (-125 -750) (250 1500))
@@ -41,13 +41,13 @@ D(D$PMOS PMOS
)
D(D$PMOS$1 PMOS
T(S
R(l1 (-575 -750) (450 1500))
R(l2 (-575 -750) (450 1500))
)
T(G
R(l4 (-125 -750) (250 1500))
)
T(D
R(l1 (125 -750) (425 1500))
R(l2 (125 -750) (425 1500))
)
T(B
R(l3 (-125 -750) (250 1500))
@@ -55,13 +55,13 @@ D(D$PMOS$1 PMOS
)
D(D$PMOS$2 PMOS
T(S
R(l1 (-550 -750) (425 1500))
R(l2 (-550 -750) (425 1500))
)
T(G
R(l4 (-125 -750) (250 1500))
)
T(D
R(l1 (125 -750) (425 1500))
R(l2 (125 -750) (425 1500))
)
T(B
R(l3 (-125 -750) (250 1500))
@@ -69,13 +69,13 @@ D(D$PMOS$2 PMOS
)
D(D$NMOS NMOS
T(S
R(l5 (-550 -475) (425 950))
R(l6 (-550 -475) (425 950))
)
T(G
R(l4 (-125 -475) (250 950))
)
T(D
R(l5 (125 -475) (450 950))
R(l6 (125 -475) (450 950))
)
T(B
R(l7 (-125 -475) (250 950))
@@ -83,13 +83,13 @@ D(D$NMOS NMOS
)
D(D$NMOS$1 NMOS
T(S
R(l5 (-575 -475) (450 950))
R(l6 (-575 -475) (450 950))
)
T(G
R(l4 (-125 -475) (250 950))
)
T(D
R(l5 (125 -475) (425 950))
R(l6 (125 -475) (425 950))
)
T(B
R(l7 (-125 -475) (250 950))
@@ -97,13 +97,13 @@ D(D$NMOS$1 NMOS
)
D(D$NMOS$2 NMOS
T(S
R(l5 (-550 -475) (425 950))
R(l6 (-550 -475) (425 950))
)
T(G
R(l4 (-125 -475) (250 950))
)
T(D
R(l5 (125 -475) (425 950))
R(l6 (125 -475) (425 950))
)
T(B
R(l7 (-125 -475) (250 950))
@@ -118,8 +118,8 @@ X(ND2X1
R(l11 (-240 -790) (300 1700))
R(l11 (-1350 0) (2400 800))
R(l11 (-1151 -401) (2 2))
R(l1 (-276 -2151) (425 1500))
R(l1 (-400 -1500) (425 1500))
R(l2 (-276 -2151) (425 1500))
R(l2 (-400 -1500) (425 1500))
)
N(2 I(OUT)
R(l8 (1810 1770) (180 180))
@@ -137,9 +137,9 @@ X(ND2X1
R(l11 (-1751 1099) (300 1400))
R(l11 (1100 -1700) (300 300))
R(l11 (-300 0) (300 1400))
R(l1 (-375 -1450) (425 1500))
R(l1 (-1800 -1500) (425 1500))
R(l5 (950 -4890) (425 950))
R(l2 (-375 -1450) (425 1500))
R(l2 (-1800 -1500) (425 1500))
R(l6 (950 -4890) (425 950))
)
N(3 I(VSS)
R(l8 (410 1770) (180 180))
@@ -147,7 +147,7 @@ X(ND2X1
R(l11 (-240 -1300) (300 1360))
R(l11 (-650 -2160) (2400 800))
R(l11 (-1151 -401) (2 2))
R(l5 (-951 859) (425 950))
R(l6 (-951 859) (425 950))
)
N(4
R(l3 (-100 4500) (2600 3500))
@@ -174,8 +174,8 @@ X(ND2X1
)
N(7 I(SUBSTRATE))
N(8
R(l5 (975 1660) (425 950))
R(l5 (-400 -950) (425 950))
R(l6 (975 1660) (425 950))
R(l6 (-400 -950) (425 950))
)
P(1 I(VDD))
P(2 I(OUT))
@@ -247,7 +247,7 @@ X(INVX1
R(l11 (-650 300) (1800 800))
R(l11 (-1450 -1100) (300 300))
R(l11 (299 399) (2 2))
R(l1 (-651 -2151) (425 1500))
R(l2 (-651 -2151) (425 1500))
)
N(2 I(OUT)
R(l8 (1110 5160) (180 180))
@@ -257,8 +257,8 @@ X(INVX1
R(l8 (-180 370) (180 180))
R(l11 (-240 -790) (300 4790))
R(l11 (-151 -2501) (2 2))
R(l1 (-226 1049) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-226 1049) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(3 I(VSS)
R(l8 (410 1770) (180 180))
@@ -266,7 +266,7 @@ X(INVX1
R(l11 (-240 -1300) (300 1360))
R(l11 (-650 -2160) (1800 800))
R(l11 (-851 -401) (2 2))
R(l5 (-651 859) (425 950))
R(l6 (-651 859) (425 950))
)
N(4
R(l3 (-100 4500) (2000 3500))
@@ -320,63 +320,63 @@ X(RINGO
N(1
R(l8 (4710 3010) (180 180))
R(l11 (-850 -240) (610 300))
R(l1 (-1175 1800) (425 1500))
R(l1 (-1800 -1500) (425 1500))
R(l5 (950 -4890) (425 950))
R(l2 (-1175 1800) (425 1500))
R(l2 (-1800 -1500) (425 1500))
R(l6 (950 -4890) (425 950))
)
N(2
R(l8 (6510 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(3
R(l8 (8310 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(4
R(l8 (10110 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(5
R(l8 (11910 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(6
R(l8 (13710 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(7
R(l8 (15510 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(8
R(l8 (17310 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(9
R(l8 (19110 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(10
R(l8 (20910 3010) (180 180))
R(l11 (-1140 -240) (900 300))
R(l1 (-1275 1800) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-1275 1800) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(11 I(FB)
R(l8 (22710 3010) (180 180))
@@ -390,8 +390,8 @@ X(RINGO
R(l13 (-17921 -201) (2 2))
R(l13 (-221 -201) (400 400))
R(l13 (17740 -400) (400 400))
R(l1 (-245 850) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-245 850) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(12 I(VDD)
R(l3 (500 4500) (1400 3500))
@@ -413,19 +413,19 @@ X(RINGO
R(l11 (-750 -1450) (300 1400))
R(l11 (-101 -351) (2 2))
R(l11 (549 -401) (600 800))
R(l1 (-23025 -2550) (425 1500))
R(l1 (-400 -1500) (425 1500))
R(l1 (1275 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l1 (1375 -1500) (425 1500))
R(l2 (-23025 -2550) (425 1500))
R(l2 (-400 -1500) (425 1500))
R(l2 (1275 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l2 (1375 -1500) (425 1500))
R(l9 (-21975 -450) (500 1500))
R(l9 (22900 -1500) (500 1500))
)
@@ -434,8 +434,8 @@ X(RINGO
R(l12 (-260 -260) (200 200))
R(l13 (-101 -101) (2 2))
R(l13 (-201 -201) (400 400))
R(l1 (-625 850) (425 1500))
R(l5 (-425 -4890) (425 950))
R(l2 (-625 850) (425 1500))
R(l6 (-425 -4890) (425 950))
)
N(14 I(ENABLE)
R(l8 (2510 3010) (180 180))
@@ -460,18 +460,18 @@ X(RINGO
R(l11 (-750 -1450) (1200 800))
R(l11 (-551 -401) (2 2))
R(l11 (549 -401) (600 800))
R(l5 (-23700 460) (425 950))
R(l5 (1975 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l5 (1375 -950) (425 950))
R(l6 (-23700 460) (425 950))
R(l6 (1975 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l6 (1375 -950) (425 950))
R(l10 (-21975 -2210) (500 1500))
R(l10 (22900 -1500) (500 1500))
)
testdata/lvs/ringo_simple_io2.lvsdb.1
Vendored
+86 -86
View File
@@ -16,22 +16,22 @@ layout(
layer(l12 '10/0')
layer(l13 '11/0')
layer(l7)
layer(l1)
layer(l2)
layer(l9)
layer(l5)
layer(l6)
layer(l10)
# Mask layer connectivity
connect(l3 l3 l9)
connect(l4 l4 l8)
connect(l8 l4 l8 l11 l1 l9 l5 l10)
connect(l8 l4 l8 l11 l2 l9 l6 l10)
connect(l11 l8 l11 l12)
connect(l12 l11 l12 l13)
connect(l13 l12 l13)
connect(l7 l7)
connect(l1 l8 l1)
connect(l2 l8 l2)
connect(l9 l3 l8 l9)
connect(l5 l8 l5)
connect(l6 l8 l6)
connect(l10 l8 l10)
# Global nets and connectivity
@@ -46,13 +46,13 @@ layout(
# Device abstracts list the pin shapes of the devices.
device(D$PMOS PMOS
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (450 1500))
rect(l2 (125 -750) (450 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -60,13 +60,13 @@ layout(
)
device(D$PMOS$1 PMOS
terminal(S
rect(l1 (-575 -750) (450 1500))
rect(l2 (-575 -750) (450 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -74,13 +74,13 @@ layout(
)
device(D$PMOS$2 PMOS
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -88,13 +88,13 @@ layout(
)
device(D$NMOS NMOS
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (450 950))
rect(l6 (125 -475) (450 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -102,13 +102,13 @@ layout(
)
device(D$NMOS$1 NMOS
terminal(S
rect(l5 (-575 -475) (450 950))
rect(l6 (-575 -475) (450 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -116,13 +116,13 @@ layout(
)
device(D$NMOS$2 NMOS
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -144,8 +144,8 @@ layout(
rect(l11 (-240 -790) (300 1700))
rect(l11 (-1350 0) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l1 (-276 -2151) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l2 (-276 -2151) (425 1500))
rect(l2 (-400 -1500) (425 1500))
)
net(2 name(OUT)
rect(l8 (1810 1770) (180 180))
@@ -163,9 +163,9 @@ layout(
rect(l11 (-1751 1099) (300 1400))
rect(l11 (1100 -1700) (300 300))
rect(l11 (-300 0) (300 1400))
rect(l1 (-1750 -1450) (425 1500))
rect(l1 (950 -1500) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1750 -1450) (425 1500))
rect(l2 (950 -1500) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -173,7 +173,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l5 (-951 859) (425 950))
rect(l6 (-951 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2600 3500))
@@ -200,8 +200,8 @@ layout(
)
net(7 name(SUBSTRATE))
net(8
rect(l5 (975 1660) (425 950))
rect(l5 (-400 -950) (425 950))
rect(l6 (975 1660) (425 950))
rect(l6 (-400 -950) (425 950))
)
# Outgoing pins and their connections to nets
@@ -282,7 +282,7 @@ layout(
rect(l11 (-650 300) (1800 800))
rect(l11 (-1450 -1100) (300 300))
rect(l11 (299 399) (2 2))
rect(l1 (-651 -2151) (425 1500))
rect(l2 (-651 -2151) (425 1500))
)
net(2 name(OUT)
rect(l8 (1110 5160) (180 180))
@@ -292,8 +292,8 @@ layout(
rect(l8 (-180 370) (180 180))
rect(l11 (-240 -790) (300 4790))
rect(l11 (-151 -2501) (2 2))
rect(l1 (-226 1049) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-226 1049) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -301,7 +301,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (1800 800))
rect(l11 (-851 -401) (2 2))
rect(l5 (-651 859) (425 950))
rect(l6 (-651 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2000 3500))
@@ -364,63 +364,63 @@ layout(
net(1
rect(l8 (4710 3010) (180 180))
rect(l11 (-850 -240) (610 300))
rect(l1 (-2550 1800) (425 1500))
rect(l1 (950 -1500) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-2550 1800) (425 1500))
rect(l2 (950 -1500) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(2
rect(l8 (6510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3
rect(l8 (8310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(4
rect(l8 (10110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(5
rect(l8 (11910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(6
rect(l8 (13710 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(7
rect(l8 (15510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(8
rect(l8 (17310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(9
rect(l8 (19110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(10
rect(l8 (20910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(11 name(FB)
rect(l8 (22710 3010) (180 180))
@@ -434,8 +434,8 @@ layout(
rect(l13 (-17921 -201) (2 2))
rect(l13 (-221 -201) (400 400))
rect(l13 (17740 -400) (400 400))
rect(l1 (-245 850) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-245 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(12 name(VDD)
rect(l3 (500 4500) (1400 3500))
@@ -457,19 +457,19 @@ layout(
rect(l11 (-750 -1450) (300 1400))
rect(l11 (-101 -351) (2 2))
rect(l11 (549 -401) (600 800))
rect(l1 (-23025 -2550) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l1 (1275 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l2 (-23025 -2550) (425 1500))
rect(l2 (-400 -1500) (425 1500))
rect(l2 (1275 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l9 (-21975 -450) (500 1500))
rect(l9 (22900 -1500) (500 1500))
)
@@ -478,8 +478,8 @@ layout(
rect(l12 (-260 -260) (200 200))
rect(l13 (-101 -101) (2 2))
rect(l13 (-201 -201) (400 400))
rect(l1 (-625 850) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-625 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(14 name(ENABLE)
rect(l8 (2510 3010) (180 180))
@@ -504,18 +504,18 @@ layout(
rect(l11 (-750 -1450) (1200 800))
rect(l11 (-551 -401) (2 2))
rect(l11 (549 -401) (600 800))
rect(l5 (-23700 460) (425 950))
rect(l5 (1975 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l6 (-23700 460) (425 950))
rect(l6 (1975 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l10 (-21975 -2210) (500 1500))
rect(l10 (22900 -1500) (500 1500))
)
@@ -905,8 +905,8 @@ xref(
pin(5 5 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(1 1 match)
)
)
circuit(ND2X1 ND2X1 match
@@ -926,10 +926,10 @@ xref(
pin(6 6 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(3 3 match)
device(4 4 match)
device(1 1 match)
device(2 2 match)
)
)
circuit(RINGO RINGO match
@@ -954,10 +954,6 @@ xref(
pin(2 4 match)
pin(1 1 match)
pin(4 0 match)
circuit(1 1 match)
circuit(10 10 match)
circuit(11 11 match)
circuit(12 12 match)
circuit(2 2 match)
circuit(3 3 match)
circuit(4 4 match)
@@ -966,6 +962,10 @@ xref(
circuit(7 7 match)
circuit(8 8 match)
circuit(9 9 match)
circuit(10 10 match)
circuit(11 11 match)
circuit(12 12 match)
circuit(1 1 match)
)
)
)
testdata/lvs/ringo_simple_io2.lvsdb.2
Vendored
+86 -86
View File
@@ -16,22 +16,22 @@ layout(
layer(l12 '10/0')
layer(l13 '11/0')
layer(l7)
layer(l1)
layer(l2)
layer(l9)
layer(l5)
layer(l6)
layer(l10)
# Mask layer connectivity
connect(l3 l3 l9)
connect(l4 l4 l8)
connect(l8 l4 l8 l11 l1 l9 l5 l10)
connect(l8 l4 l8 l11 l2 l9 l6 l10)
connect(l11 l8 l11 l12)
connect(l12 l11 l12 l13)
connect(l13 l12 l13)
connect(l7 l7)
connect(l1 l8 l1)
connect(l2 l8 l2)
connect(l9 l3 l8 l9)
connect(l5 l8 l5)
connect(l6 l8 l6)
connect(l10 l8 l10)
# Global nets and connectivity
@@ -46,13 +46,13 @@ layout(
# Device abstracts list the pin shapes of the devices.
device(D$PMOS PMOS
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (450 1500))
rect(l2 (125 -750) (450 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -60,13 +60,13 @@ layout(
)
device(D$PMOS$1 PMOS
terminal(S
rect(l1 (-575 -750) (450 1500))
rect(l2 (-575 -750) (450 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -74,13 +74,13 @@ layout(
)
device(D$PMOS$2 PMOS
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -88,13 +88,13 @@ layout(
)
device(D$NMOS NMOS
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (450 950))
rect(l6 (125 -475) (450 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -102,13 +102,13 @@ layout(
)
device(D$NMOS$1 NMOS
terminal(S
rect(l5 (-575 -475) (450 950))
rect(l6 (-575 -475) (450 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -116,13 +116,13 @@ layout(
)
device(D$NMOS$2 NMOS
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -144,8 +144,8 @@ layout(
rect(l11 (-240 -790) (300 1700))
rect(l11 (-1350 0) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l1 (-276 -2151) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l2 (-276 -2151) (425 1500))
rect(l2 (-400 -1500) (425 1500))
)
net(2 name(OUT)
rect(l8 (1810 1770) (180 180))
@@ -163,9 +163,9 @@ layout(
rect(l11 (-1751 1099) (300 1400))
rect(l11 (1100 -1700) (300 300))
rect(l11 (-300 0) (300 1400))
rect(l1 (-375 -1450) (425 1500))
rect(l1 (-1800 -1500) (425 1500))
rect(l5 (950 -4890) (425 950))
rect(l2 (-375 -1450) (425 1500))
rect(l2 (-1800 -1500) (425 1500))
rect(l6 (950 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -173,7 +173,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l5 (-951 859) (425 950))
rect(l6 (-951 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2600 3500))
@@ -200,8 +200,8 @@ layout(
)
net(7 name(SUBSTRATE))
net(8
rect(l5 (975 1660) (425 950))
rect(l5 (-400 -950) (425 950))
rect(l6 (975 1660) (425 950))
rect(l6 (-400 -950) (425 950))
)
# Outgoing pins and their connections to nets
@@ -282,7 +282,7 @@ layout(
rect(l11 (-650 300) (1800 800))
rect(l11 (-1450 -1100) (300 300))
rect(l11 (299 399) (2 2))
rect(l1 (-651 -2151) (425 1500))
rect(l2 (-651 -2151) (425 1500))
)
net(2 name(OUT)
rect(l8 (1110 5160) (180 180))
@@ -292,8 +292,8 @@ layout(
rect(l8 (-180 370) (180 180))
rect(l11 (-240 -790) (300 4790))
rect(l11 (-151 -2501) (2 2))
rect(l1 (-226 1049) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-226 1049) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -301,7 +301,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (1800 800))
rect(l11 (-851 -401) (2 2))
rect(l5 (-651 859) (425 950))
rect(l6 (-651 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2000 3500))
@@ -364,63 +364,63 @@ layout(
net(1
rect(l8 (4710 3010) (180 180))
rect(l11 (-850 -240) (610 300))
rect(l1 (-1175 1800) (425 1500))
rect(l1 (-1800 -1500) (425 1500))
rect(l5 (950 -4890) (425 950))
rect(l2 (-1175 1800) (425 1500))
rect(l2 (-1800 -1500) (425 1500))
rect(l6 (950 -4890) (425 950))
)
net(2
rect(l8 (6510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3
rect(l8 (8310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(4
rect(l8 (10110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(5
rect(l8 (11910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(6
rect(l8 (13710 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(7
rect(l8 (15510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(8
rect(l8 (17310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(9
rect(l8 (19110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(10
rect(l8 (20910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(11 name(FB)
rect(l8 (22710 3010) (180 180))
@@ -434,8 +434,8 @@ layout(
rect(l13 (-17921 -201) (2 2))
rect(l13 (-221 -201) (400 400))
rect(l13 (17740 -400) (400 400))
rect(l1 (-245 850) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-245 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(12 name(VDD)
rect(l3 (500 4500) (1400 3500))
@@ -457,19 +457,19 @@ layout(
rect(l11 (-750 -1450) (300 1400))
rect(l11 (-101 -351) (2 2))
rect(l11 (549 -401) (600 800))
rect(l1 (-23025 -2550) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l1 (1275 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l2 (-23025 -2550) (425 1500))
rect(l2 (-400 -1500) (425 1500))
rect(l2 (1275 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l9 (-21975 -450) (500 1500))
rect(l9 (22900 -1500) (500 1500))
)
@@ -478,8 +478,8 @@ layout(
rect(l12 (-260 -260) (200 200))
rect(l13 (-101 -101) (2 2))
rect(l13 (-201 -201) (400 400))
rect(l1 (-625 850) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-625 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(14 name(ENABLE)
rect(l8 (2510 3010) (180 180))
@@ -504,18 +504,18 @@ layout(
rect(l11 (-750 -1450) (1200 800))
rect(l11 (-551 -401) (2 2))
rect(l11 (549 -401) (600 800))
rect(l5 (-23700 460) (425 950))
rect(l5 (1975 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l6 (-23700 460) (425 950))
rect(l6 (1975 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l10 (-21975 -2210) (500 1500))
rect(l10 (22900 -1500) (500 1500))
)
@@ -905,8 +905,8 @@ xref(
pin(5 5 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(1 1 match)
)
)
circuit(ND2X1 ND2X1 match
@@ -926,10 +926,10 @@ xref(
pin(6 6 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(3 3 match)
device(4 4 match)
device(1 1 match)
device(2 2 match)
)
)
circuit(RINGO RINGO match
@@ -954,10 +954,6 @@ xref(
pin(2 4 match)
pin(1 1 match)
pin(4 0 match)
circuit(1 1 match)
circuit(10 10 match)
circuit(11 11 match)
circuit(12 12 match)
circuit(2 2 match)
circuit(3 3 match)
circuit(4 4 match)
@@ -966,6 +962,10 @@ xref(
circuit(7 7 match)
circuit(8 8 match)
circuit(9 9 match)
circuit(10 10 match)
circuit(11 11 match)
circuit(12 12 match)
circuit(1 1 match)
)
)
)
testdata/lvs/ringo_simple_net_and_circuit_equivalence.lvsdb.1
Vendored
+86 -86
View File
@@ -16,22 +16,22 @@ layout(
layer(l12 '10/0')
layer(l13 '11/0')
layer(l7)
layer(l1)
layer(l2)
layer(l9)
layer(l5)
layer(l6)
layer(l10)
# Mask layer connectivity
connect(l3 l3 l9)
connect(l4 l4 l8)
connect(l8 l4 l8 l11 l1 l9 l5 l10)
connect(l8 l4 l8 l11 l2 l9 l6 l10)
connect(l11 l8 l11 l12)
connect(l12 l11 l12 l13)
connect(l13 l12 l13)
connect(l7 l7)
connect(l1 l8 l1)
connect(l2 l8 l2)
connect(l9 l3 l8 l9)
connect(l5 l8 l5)
connect(l6 l8 l6)
connect(l10 l8 l10)
# Global nets and connectivity
@@ -46,13 +46,13 @@ layout(
# Device abstracts list the pin shapes of the devices.
device(D$PMOS PMOS
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (450 1500))
rect(l2 (125 -750) (450 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -60,13 +60,13 @@ layout(
)
device(D$PMOS$1 PMOS
terminal(S
rect(l1 (-575 -750) (450 1500))
rect(l2 (-575 -750) (450 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -74,13 +74,13 @@ layout(
)
device(D$PMOS$2 PMOS
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -88,13 +88,13 @@ layout(
)
device(D$NMOS NMOS
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (450 950))
rect(l6 (125 -475) (450 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -102,13 +102,13 @@ layout(
)
device(D$NMOS$1 NMOS
terminal(S
rect(l5 (-575 -475) (450 950))
rect(l6 (-575 -475) (450 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -116,13 +116,13 @@ layout(
)
device(D$NMOS$2 NMOS
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -144,8 +144,8 @@ layout(
rect(l11 (-240 -790) (300 1700))
rect(l11 (-1350 0) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l1 (-276 -2151) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l2 (-276 -2151) (425 1500))
rect(l2 (-400 -1500) (425 1500))
)
net(2 name(OUT)
rect(l8 (1810 1770) (180 180))
@@ -163,9 +163,9 @@ layout(
rect(l11 (-1751 1099) (300 1400))
rect(l11 (1100 -1700) (300 300))
rect(l11 (-300 0) (300 1400))
rect(l1 (-1750 -1450) (425 1500))
rect(l1 (950 -1500) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1750 -1450) (425 1500))
rect(l2 (950 -1500) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -173,7 +173,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l5 (-951 859) (425 950))
rect(l6 (-951 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2600 3500))
@@ -200,8 +200,8 @@ layout(
)
net(7 name(SUBSTRATE))
net(8
rect(l5 (975 1660) (425 950))
rect(l5 (-400 -950) (425 950))
rect(l6 (975 1660) (425 950))
rect(l6 (-400 -950) (425 950))
)
# Outgoing pins and their connections to nets
@@ -282,7 +282,7 @@ layout(
rect(l11 (-650 300) (1800 800))
rect(l11 (-1450 -1100) (300 300))
rect(l11 (299 399) (2 2))
rect(l1 (-651 -2151) (425 1500))
rect(l2 (-651 -2151) (425 1500))
)
net(2 name(OUT)
rect(l8 (1110 5160) (180 180))
@@ -292,8 +292,8 @@ layout(
rect(l8 (-180 370) (180 180))
rect(l11 (-240 -790) (300 4790))
rect(l11 (-151 -2501) (2 2))
rect(l1 (-226 1049) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-226 1049) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -301,7 +301,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (1800 800))
rect(l11 (-851 -401) (2 2))
rect(l5 (-651 859) (425 950))
rect(l6 (-651 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2000 3500))
@@ -364,63 +364,63 @@ layout(
net(1
rect(l8 (4710 3010) (180 180))
rect(l11 (-850 -240) (610 300))
rect(l1 (-2550 1800) (425 1500))
rect(l1 (950 -1500) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-2550 1800) (425 1500))
rect(l2 (950 -1500) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(2
rect(l8 (6510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3
rect(l8 (8310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(4
rect(l8 (10110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(5
rect(l8 (11910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(6
rect(l8 (13710 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(7
rect(l8 (15510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(8
rect(l8 (17310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(9
rect(l8 (19110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(10
rect(l8 (20910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(11 name(FB)
rect(l8 (22710 3010) (180 180))
@@ -434,8 +434,8 @@ layout(
rect(l13 (-17921 -201) (2 2))
rect(l13 (-221 -201) (400 400))
rect(l13 (17740 -400) (400 400))
rect(l1 (-245 850) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-245 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(12 name(VDD)
rect(l3 (500 4500) (1400 3500))
@@ -457,19 +457,19 @@ layout(
rect(l11 (-750 -1450) (300 1400))
rect(l11 (-101 -351) (2 2))
rect(l11 (549 -401) (600 800))
rect(l1 (-23025 -2550) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l1 (1275 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l2 (-23025 -2550) (425 1500))
rect(l2 (-400 -1500) (425 1500))
rect(l2 (1275 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l9 (-21975 -450) (500 1500))
rect(l9 (22900 -1500) (500 1500))
)
@@ -478,8 +478,8 @@ layout(
rect(l12 (-260 -260) (200 200))
rect(l13 (-101 -101) (2 2))
rect(l13 (-201 -201) (400 400))
rect(l1 (-625 850) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-625 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(14 name(ENABLE)
rect(l8 (2510 3010) (180 180))
@@ -504,18 +504,18 @@ layout(
rect(l11 (-750 -1450) (1200 800))
rect(l11 (-551 -401) (2 2))
rect(l11 (549 -401) (600 800))
rect(l5 (-23700 460) (425 950))
rect(l5 (1975 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l6 (-23700 460) (425 950))
rect(l6 (1975 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l10 (-21975 -2210) (500 1500))
rect(l10 (22900 -1500) (500 1500))
)
@@ -905,8 +905,8 @@ xref(
pin(5 5 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(1 1 match)
)
)
circuit(nd2X1 ND2X1 match
@@ -926,10 +926,10 @@ xref(
pin(6 6 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(3 3 match)
device(4 4 match)
device(1 1 match)
device(2 2 match)
)
)
circuit(top RINGO match
@@ -953,10 +953,6 @@ xref(
pin(2 4 match)
pin(1 1 match)
pin(4 0 match)
circuit(1 1 match)
circuit(10 10 match)
circuit(11 11 match)
circuit(12 12 match)
circuit(2 2 match)
circuit(3 3 match)
circuit(4 4 match)
@@ -965,6 +961,10 @@ xref(
circuit(7 7 match)
circuit(8 8 match)
circuit(9 9 match)
circuit(10 10 match)
circuit(11 11 match)
circuit(12 12 match)
circuit(1 1 match)
)
)
)
testdata/lvs/ringo_simple_net_and_circuit_equivalence.lvsdb.2
Vendored
+86 -86
View File
@@ -16,22 +16,22 @@ layout(
layer(l12 '10/0')
layer(l13 '11/0')
layer(l7)
layer(l1)
layer(l2)
layer(l9)
layer(l5)
layer(l6)
layer(l10)
# Mask layer connectivity
connect(l3 l3 l9)
connect(l4 l4 l8)
connect(l8 l4 l8 l11 l1 l9 l5 l10)
connect(l8 l4 l8 l11 l2 l9 l6 l10)
connect(l11 l8 l11 l12)
connect(l12 l11 l12 l13)
connect(l13 l12 l13)
connect(l7 l7)
connect(l1 l8 l1)
connect(l2 l8 l2)
connect(l9 l3 l8 l9)
connect(l5 l8 l5)
connect(l6 l8 l6)
connect(l10 l8 l10)
# Global nets and connectivity
@@ -46,13 +46,13 @@ layout(
# Device abstracts list the pin shapes of the devices.
device(D$PMOS PMOS
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (450 1500))
rect(l2 (125 -750) (450 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -60,13 +60,13 @@ layout(
)
device(D$PMOS$1 PMOS
terminal(S
rect(l1 (-575 -750) (450 1500))
rect(l2 (-575 -750) (450 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -74,13 +74,13 @@ layout(
)
device(D$PMOS$2 PMOS
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -88,13 +88,13 @@ layout(
)
device(D$NMOS NMOS
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (450 950))
rect(l6 (125 -475) (450 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -102,13 +102,13 @@ layout(
)
device(D$NMOS$1 NMOS
terminal(S
rect(l5 (-575 -475) (450 950))
rect(l6 (-575 -475) (450 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -116,13 +116,13 @@ layout(
)
device(D$NMOS$2 NMOS
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -144,8 +144,8 @@ layout(
rect(l11 (-240 -790) (300 1700))
rect(l11 (-1350 0) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l1 (-276 -2151) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l2 (-276 -2151) (425 1500))
rect(l2 (-400 -1500) (425 1500))
)
net(2 name(OUT)
rect(l8 (1810 1770) (180 180))
@@ -163,9 +163,9 @@ layout(
rect(l11 (-1751 1099) (300 1400))
rect(l11 (1100 -1700) (300 300))
rect(l11 (-300 0) (300 1400))
rect(l1 (-375 -1450) (425 1500))
rect(l1 (-1800 -1500) (425 1500))
rect(l5 (950 -4890) (425 950))
rect(l2 (-375 -1450) (425 1500))
rect(l2 (-1800 -1500) (425 1500))
rect(l6 (950 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -173,7 +173,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l5 (-951 859) (425 950))
rect(l6 (-951 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2600 3500))
@@ -200,8 +200,8 @@ layout(
)
net(7 name(SUBSTRATE))
net(8
rect(l5 (975 1660) (425 950))
rect(l5 (-400 -950) (425 950))
rect(l6 (975 1660) (425 950))
rect(l6 (-400 -950) (425 950))
)
# Outgoing pins and their connections to nets
@@ -282,7 +282,7 @@ layout(
rect(l11 (-650 300) (1800 800))
rect(l11 (-1450 -1100) (300 300))
rect(l11 (299 399) (2 2))
rect(l1 (-651 -2151) (425 1500))
rect(l2 (-651 -2151) (425 1500))
)
net(2 name(OUT)
rect(l8 (1110 5160) (180 180))
@@ -292,8 +292,8 @@ layout(
rect(l8 (-180 370) (180 180))
rect(l11 (-240 -790) (300 4790))
rect(l11 (-151 -2501) (2 2))
rect(l1 (-226 1049) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-226 1049) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -301,7 +301,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (1800 800))
rect(l11 (-851 -401) (2 2))
rect(l5 (-651 859) (425 950))
rect(l6 (-651 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2000 3500))
@@ -364,63 +364,63 @@ layout(
net(1
rect(l8 (4710 3010) (180 180))
rect(l11 (-850 -240) (610 300))
rect(l1 (-1175 1800) (425 1500))
rect(l1 (-1800 -1500) (425 1500))
rect(l5 (950 -4890) (425 950))
rect(l2 (-1175 1800) (425 1500))
rect(l2 (-1800 -1500) (425 1500))
rect(l6 (950 -4890) (425 950))
)
net(2
rect(l8 (6510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3
rect(l8 (8310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(4
rect(l8 (10110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(5
rect(l8 (11910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(6
rect(l8 (13710 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(7
rect(l8 (15510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(8
rect(l8 (17310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(9
rect(l8 (19110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(10
rect(l8 (20910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(11 name(FB)
rect(l8 (22710 3010) (180 180))
@@ -434,8 +434,8 @@ layout(
rect(l13 (-17921 -201) (2 2))
rect(l13 (-221 -201) (400 400))
rect(l13 (17740 -400) (400 400))
rect(l1 (-245 850) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-245 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(12 name(VDD)
rect(l3 (500 4500) (1400 3500))
@@ -457,19 +457,19 @@ layout(
rect(l11 (-750 -1450) (300 1400))
rect(l11 (-101 -351) (2 2))
rect(l11 (549 -401) (600 800))
rect(l1 (-23025 -2550) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l1 (1275 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l2 (-23025 -2550) (425 1500))
rect(l2 (-400 -1500) (425 1500))
rect(l2 (1275 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l9 (-21975 -450) (500 1500))
rect(l9 (22900 -1500) (500 1500))
)
@@ -478,8 +478,8 @@ layout(
rect(l12 (-260 -260) (200 200))
rect(l13 (-101 -101) (2 2))
rect(l13 (-201 -201) (400 400))
rect(l1 (-625 850) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-625 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(14 name(ENABLE)
rect(l8 (2510 3010) (180 180))
@@ -504,18 +504,18 @@ layout(
rect(l11 (-750 -1450) (1200 800))
rect(l11 (-551 -401) (2 2))
rect(l11 (549 -401) (600 800))
rect(l5 (-23700 460) (425 950))
rect(l5 (1975 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l6 (-23700 460) (425 950))
rect(l6 (1975 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l10 (-21975 -2210) (500 1500))
rect(l10 (22900 -1500) (500 1500))
)
@@ -905,8 +905,8 @@ xref(
pin(5 5 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(1 1 match)
)
)
circuit(nd2X1 ND2X1 match
@@ -926,10 +926,10 @@ xref(
pin(6 6 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(3 3 match)
device(4 4 match)
device(1 1 match)
device(2 2 match)
)
)
circuit(top RINGO match
@@ -953,10 +953,6 @@ xref(
pin(2 4 match)
pin(1 1 match)
pin(4 0 match)
circuit(1 1 match)
circuit(10 10 match)
circuit(11 11 match)
circuit(12 12 match)
circuit(2 2 match)
circuit(3 3 match)
circuit(4 4 match)
@@ -965,6 +961,10 @@ xref(
circuit(7 7 match)
circuit(8 8 match)
circuit(9 9 match)
circuit(10 10 match)
circuit(11 11 match)
circuit(12 12 match)
circuit(1 1 match)
)
)
)
testdata/lvs/ringo_simple_pin_swapping.lvsdb.1
Vendored
+86 -86
View File
@@ -16,22 +16,22 @@ layout(
layer(l12 '10/0')
layer(l13 '11/0')
layer(l7)
layer(l1)
layer(l2)
layer(l9)
layer(l5)
layer(l6)
layer(l10)
# Mask layer connectivity
connect(l3 l3 l9)
connect(l4 l4 l8)
connect(l8 l4 l8 l11 l1 l9 l5 l10)
connect(l8 l4 l8 l11 l2 l9 l6 l10)
connect(l11 l8 l11 l12)
connect(l12 l11 l12 l13)
connect(l13 l12 l13)
connect(l7 l7)
connect(l1 l8 l1)
connect(l2 l8 l2)
connect(l9 l3 l8 l9)
connect(l5 l8 l5)
connect(l6 l8 l6)
connect(l10 l8 l10)
# Global nets and connectivity
@@ -46,13 +46,13 @@ layout(
# Device abstracts list the pin shapes of the devices.
device(D$PMOS PMOS
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (450 1500))
rect(l2 (125 -750) (450 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -60,13 +60,13 @@ layout(
)
device(D$PMOS$1 PMOS
terminal(S
rect(l1 (-575 -750) (450 1500))
rect(l2 (-575 -750) (450 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -74,13 +74,13 @@ layout(
)
device(D$PMOS$2 PMOS
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -88,13 +88,13 @@ layout(
)
device(D$NMOS NMOS
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (450 950))
rect(l6 (125 -475) (450 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -102,13 +102,13 @@ layout(
)
device(D$NMOS$1 NMOS
terminal(S
rect(l5 (-575 -475) (450 950))
rect(l6 (-575 -475) (450 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -116,13 +116,13 @@ layout(
)
device(D$NMOS$2 NMOS
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -144,8 +144,8 @@ layout(
rect(l11 (-240 -790) (300 1700))
rect(l11 (-1350 0) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l1 (-276 -2151) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l2 (-276 -2151) (425 1500))
rect(l2 (-400 -1500) (425 1500))
)
net(2 name(OUT)
rect(l8 (1810 1770) (180 180))
@@ -163,9 +163,9 @@ layout(
rect(l11 (-1751 1099) (300 1400))
rect(l11 (1100 -1700) (300 300))
rect(l11 (-300 0) (300 1400))
rect(l1 (-1750 -1450) (425 1500))
rect(l1 (950 -1500) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1750 -1450) (425 1500))
rect(l2 (950 -1500) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -173,7 +173,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l5 (-951 859) (425 950))
rect(l6 (-951 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2600 3500))
@@ -200,8 +200,8 @@ layout(
)
net(7 name(SUBSTRATE))
net(8
rect(l5 (975 1660) (425 950))
rect(l5 (-400 -950) (425 950))
rect(l6 (975 1660) (425 950))
rect(l6 (-400 -950) (425 950))
)
# Outgoing pins and their connections to nets
@@ -282,7 +282,7 @@ layout(
rect(l11 (-650 300) (1800 800))
rect(l11 (-1450 -1100) (300 300))
rect(l11 (299 399) (2 2))
rect(l1 (-651 -2151) (425 1500))
rect(l2 (-651 -2151) (425 1500))
)
net(2 name(OUT)
rect(l8 (1110 5160) (180 180))
@@ -292,8 +292,8 @@ layout(
rect(l8 (-180 370) (180 180))
rect(l11 (-240 -790) (300 4790))
rect(l11 (-151 -2501) (2 2))
rect(l1 (-226 1049) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-226 1049) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -301,7 +301,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (1800 800))
rect(l11 (-851 -401) (2 2))
rect(l5 (-651 859) (425 950))
rect(l6 (-651 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2000 3500))
@@ -364,63 +364,63 @@ layout(
net(1
rect(l8 (4710 3010) (180 180))
rect(l11 (-850 -240) (610 300))
rect(l1 (-2550 1800) (425 1500))
rect(l1 (950 -1500) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-2550 1800) (425 1500))
rect(l2 (950 -1500) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(2
rect(l8 (6510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3
rect(l8 (8310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(4
rect(l8 (10110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(5
rect(l8 (11910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(6
rect(l8 (13710 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(7
rect(l8 (15510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(8
rect(l8 (17310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(9
rect(l8 (19110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(10
rect(l8 (20910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(11 name(FB)
rect(l8 (22710 3010) (180 180))
@@ -434,8 +434,8 @@ layout(
rect(l13 (-17921 -201) (2 2))
rect(l13 (-221 -201) (400 400))
rect(l13 (17740 -400) (400 400))
rect(l1 (-245 850) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-245 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(12 name(VDD)
rect(l3 (500 4500) (1400 3500))
@@ -457,19 +457,19 @@ layout(
rect(l11 (-750 -1450) (300 1400))
rect(l11 (-101 -351) (2 2))
rect(l11 (549 -401) (600 800))
rect(l1 (-23025 -2550) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l1 (1275 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l2 (-23025 -2550) (425 1500))
rect(l2 (-400 -1500) (425 1500))
rect(l2 (1275 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l9 (-21975 -450) (500 1500))
rect(l9 (22900 -1500) (500 1500))
)
@@ -478,8 +478,8 @@ layout(
rect(l12 (-260 -260) (200 200))
rect(l13 (-101 -101) (2 2))
rect(l13 (-201 -201) (400 400))
rect(l1 (-625 850) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-625 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(14 name(ENABLE)
rect(l8 (2510 3010) (180 180))
@@ -504,18 +504,18 @@ layout(
rect(l11 (-750 -1450) (1200 800))
rect(l11 (-551 -401) (2 2))
rect(l11 (549 -401) (600 800))
rect(l5 (-23700 460) (425 950))
rect(l5 (1975 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l6 (-23700 460) (425 950))
rect(l6 (1975 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l10 (-21975 -2210) (500 1500))
rect(l10 (22900 -1500) (500 1500))
)
@@ -905,8 +905,8 @@ xref(
pin(5 5 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(1 1 match)
)
)
circuit(ND2X1 ND2X1 match
@@ -926,10 +926,10 @@ xref(
pin(6 6 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(3 3 match)
device(4 4 match)
device(1 1 match)
device(2 2 match)
)
)
circuit(RINGO RINGO match
@@ -954,10 +954,6 @@ xref(
pin(2 4 match)
pin(1 1 match)
pin(4 0 match)
circuit(1 1 match)
circuit(10 10 match)
circuit(11 11 match)
circuit(12 12 match)
circuit(2 2 match)
circuit(3 3 match)
circuit(4 4 match)
@@ -966,6 +962,10 @@ xref(
circuit(7 7 match)
circuit(8 8 match)
circuit(9 9 match)
circuit(10 10 match)
circuit(11 11 match)
circuit(12 12 match)
circuit(1 1 match)
)
)
)
testdata/lvs/ringo_simple_pin_swapping.lvsdb.2
Vendored
+86 -86
View File
@@ -16,22 +16,22 @@ layout(
layer(l12 '10/0')
layer(l13 '11/0')
layer(l7)
layer(l1)
layer(l2)
layer(l9)
layer(l5)
layer(l6)
layer(l10)
# Mask layer connectivity
connect(l3 l3 l9)
connect(l4 l4 l8)
connect(l8 l4 l8 l11 l1 l9 l5 l10)
connect(l8 l4 l8 l11 l2 l9 l6 l10)
connect(l11 l8 l11 l12)
connect(l12 l11 l12 l13)
connect(l13 l12 l13)
connect(l7 l7)
connect(l1 l8 l1)
connect(l2 l8 l2)
connect(l9 l3 l8 l9)
connect(l5 l8 l5)
connect(l6 l8 l6)
connect(l10 l8 l10)
# Global nets and connectivity
@@ -46,13 +46,13 @@ layout(
# Device abstracts list the pin shapes of the devices.
device(D$PMOS PMOS
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (450 1500))
rect(l2 (125 -750) (450 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -60,13 +60,13 @@ layout(
)
device(D$PMOS$1 PMOS
terminal(S
rect(l1 (-575 -750) (450 1500))
rect(l2 (-575 -750) (450 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -74,13 +74,13 @@ layout(
)
device(D$PMOS$2 PMOS
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -88,13 +88,13 @@ layout(
)
device(D$NMOS NMOS
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (450 950))
rect(l6 (125 -475) (450 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -102,13 +102,13 @@ layout(
)
device(D$NMOS$1 NMOS
terminal(S
rect(l5 (-575 -475) (450 950))
rect(l6 (-575 -475) (450 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -116,13 +116,13 @@ layout(
)
device(D$NMOS$2 NMOS
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -144,8 +144,8 @@ layout(
rect(l11 (-240 -790) (300 1700))
rect(l11 (-1350 0) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l1 (-276 -2151) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l2 (-276 -2151) (425 1500))
rect(l2 (-400 -1500) (425 1500))
)
net(2 name(OUT)
rect(l8 (1810 1770) (180 180))
@@ -163,9 +163,9 @@ layout(
rect(l11 (-1751 1099) (300 1400))
rect(l11 (1100 -1700) (300 300))
rect(l11 (-300 0) (300 1400))
rect(l1 (-375 -1450) (425 1500))
rect(l1 (-1800 -1500) (425 1500))
rect(l5 (950 -4890) (425 950))
rect(l2 (-375 -1450) (425 1500))
rect(l2 (-1800 -1500) (425 1500))
rect(l6 (950 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -173,7 +173,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l5 (-951 859) (425 950))
rect(l6 (-951 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2600 3500))
@@ -200,8 +200,8 @@ layout(
)
net(7 name(SUBSTRATE))
net(8
rect(l5 (975 1660) (425 950))
rect(l5 (-400 -950) (425 950))
rect(l6 (975 1660) (425 950))
rect(l6 (-400 -950) (425 950))
)
# Outgoing pins and their connections to nets
@@ -282,7 +282,7 @@ layout(
rect(l11 (-650 300) (1800 800))
rect(l11 (-1450 -1100) (300 300))
rect(l11 (299 399) (2 2))
rect(l1 (-651 -2151) (425 1500))
rect(l2 (-651 -2151) (425 1500))
)
net(2 name(OUT)
rect(l8 (1110 5160) (180 180))
@@ -292,8 +292,8 @@ layout(
rect(l8 (-180 370) (180 180))
rect(l11 (-240 -790) (300 4790))
rect(l11 (-151 -2501) (2 2))
rect(l1 (-226 1049) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-226 1049) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -301,7 +301,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (1800 800))
rect(l11 (-851 -401) (2 2))
rect(l5 (-651 859) (425 950))
rect(l6 (-651 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2000 3500))
@@ -364,63 +364,63 @@ layout(
net(1
rect(l8 (4710 3010) (180 180))
rect(l11 (-850 -240) (610 300))
rect(l1 (-1175 1800) (425 1500))
rect(l1 (-1800 -1500) (425 1500))
rect(l5 (950 -4890) (425 950))
rect(l2 (-1175 1800) (425 1500))
rect(l2 (-1800 -1500) (425 1500))
rect(l6 (950 -4890) (425 950))
)
net(2
rect(l8 (6510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3
rect(l8 (8310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(4
rect(l8 (10110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(5
rect(l8 (11910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(6
rect(l8 (13710 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(7
rect(l8 (15510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(8
rect(l8 (17310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(9
rect(l8 (19110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(10
rect(l8 (20910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(11 name(FB)
rect(l8 (22710 3010) (180 180))
@@ -434,8 +434,8 @@ layout(
rect(l13 (-17921 -201) (2 2))
rect(l13 (-221 -201) (400 400))
rect(l13 (17740 -400) (400 400))
rect(l1 (-245 850) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-245 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(12 name(VDD)
rect(l3 (500 4500) (1400 3500))
@@ -457,19 +457,19 @@ layout(
rect(l11 (-750 -1450) (300 1400))
rect(l11 (-101 -351) (2 2))
rect(l11 (549 -401) (600 800))
rect(l1 (-23025 -2550) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l1 (1275 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l2 (-23025 -2550) (425 1500))
rect(l2 (-400 -1500) (425 1500))
rect(l2 (1275 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l9 (-21975 -450) (500 1500))
rect(l9 (22900 -1500) (500 1500))
)
@@ -478,8 +478,8 @@ layout(
rect(l12 (-260 -260) (200 200))
rect(l13 (-101 -101) (2 2))
rect(l13 (-201 -201) (400 400))
rect(l1 (-625 850) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-625 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(14 name(ENABLE)
rect(l8 (2510 3010) (180 180))
@@ -504,18 +504,18 @@ layout(
rect(l11 (-750 -1450) (1200 800))
rect(l11 (-551 -401) (2 2))
rect(l11 (549 -401) (600 800))
rect(l5 (-23700 460) (425 950))
rect(l5 (1975 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l6 (-23700 460) (425 950))
rect(l6 (1975 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l10 (-21975 -2210) (500 1500))
rect(l10 (22900 -1500) (500 1500))
)
@@ -905,8 +905,8 @@ xref(
pin(5 5 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(1 1 match)
)
)
circuit(ND2X1 ND2X1 match
@@ -926,10 +926,10 @@ xref(
pin(6 6 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(3 3 match)
device(4 4 match)
device(1 1 match)
device(2 2 match)
)
)
circuit(RINGO RINGO match
@@ -954,10 +954,6 @@ xref(
pin(2 4 match)
pin(1 1 match)
pin(4 0 match)
circuit(1 1 match)
circuit(10 10 match)
circuit(11 11 match)
circuit(12 12 match)
circuit(2 2 match)
circuit(3 3 match)
circuit(4 4 match)
@@ -966,6 +962,10 @@ xref(
circuit(7 7 match)
circuit(8 8 match)
circuit(9 9 match)
circuit(10 10 match)
circuit(11 11 match)
circuit(12 12 match)
circuit(1 1 match)
)
)
)
testdata/lvs/ringo_simple_same_device_classes.lvsdb.1
Vendored
+86 -86
View File
@@ -16,22 +16,22 @@ layout(
layer(l12 '10/0')
layer(l13 '11/0')
layer(l7)
layer(l1)
layer(l2)
layer(l9)
layer(l5)
layer(l6)
layer(l10)
# Mask layer connectivity
connect(l3 l3 l9)
connect(l4 l4 l8)
connect(l8 l4 l8 l11 l1 l9 l5 l10)
connect(l8 l4 l8 l11 l2 l9 l6 l10)
connect(l11 l8 l11 l12)
connect(l12 l11 l12 l13)
connect(l13 l12 l13)
connect(l7 l7)
connect(l1 l8 l1)
connect(l2 l8 l2)
connect(l9 l3 l8 l9)
connect(l5 l8 l5)
connect(l6 l8 l6)
connect(l10 l8 l10)
# Global nets and connectivity
@@ -46,13 +46,13 @@ layout(
# Device abstracts list the pin shapes of the devices.
device(D$PM PM
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (450 1500))
rect(l2 (125 -750) (450 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -60,13 +60,13 @@ layout(
)
device(D$PM$1 PM
terminal(S
rect(l1 (-575 -750) (450 1500))
rect(l2 (-575 -750) (450 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -74,13 +74,13 @@ layout(
)
device(D$PM$2 PM
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -88,13 +88,13 @@ layout(
)
device(D$NM NM
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (450 950))
rect(l6 (125 -475) (450 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -102,13 +102,13 @@ layout(
)
device(D$NM$1 NM
terminal(S
rect(l5 (-575 -475) (450 950))
rect(l6 (-575 -475) (450 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -116,13 +116,13 @@ layout(
)
device(D$NM$2 NM
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -144,8 +144,8 @@ layout(
rect(l11 (-240 -790) (300 1700))
rect(l11 (-1350 0) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l1 (-276 -2151) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l2 (-276 -2151) (425 1500))
rect(l2 (-400 -1500) (425 1500))
)
net(2 name(OUT)
rect(l8 (1810 1770) (180 180))
@@ -163,9 +163,9 @@ layout(
rect(l11 (-1751 1099) (300 1400))
rect(l11 (1100 -1700) (300 300))
rect(l11 (-300 0) (300 1400))
rect(l1 (-1750 -1450) (425 1500))
rect(l1 (950 -1500) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1750 -1450) (425 1500))
rect(l2 (950 -1500) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -173,7 +173,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l5 (-951 859) (425 950))
rect(l6 (-951 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2600 3500))
@@ -200,8 +200,8 @@ layout(
)
net(7 name(SUBSTRATE))
net(8
rect(l5 (975 1660) (425 950))
rect(l5 (-400 -950) (425 950))
rect(l6 (975 1660) (425 950))
rect(l6 (-400 -950) (425 950))
)
# Outgoing pins and their connections to nets
@@ -282,7 +282,7 @@ layout(
rect(l11 (-650 300) (1800 800))
rect(l11 (-1450 -1100) (300 300))
rect(l11 (299 399) (2 2))
rect(l1 (-651 -2151) (425 1500))
rect(l2 (-651 -2151) (425 1500))
)
net(2 name(OUT)
rect(l8 (1110 5160) (180 180))
@@ -292,8 +292,8 @@ layout(
rect(l8 (-180 370) (180 180))
rect(l11 (-240 -790) (300 4790))
rect(l11 (-151 -2501) (2 2))
rect(l1 (-226 1049) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-226 1049) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -301,7 +301,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (1800 800))
rect(l11 (-851 -401) (2 2))
rect(l5 (-651 859) (425 950))
rect(l6 (-651 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2000 3500))
@@ -364,63 +364,63 @@ layout(
net(1
rect(l8 (4710 3010) (180 180))
rect(l11 (-850 -240) (610 300))
rect(l1 (-2550 1800) (425 1500))
rect(l1 (950 -1500) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-2550 1800) (425 1500))
rect(l2 (950 -1500) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(2
rect(l8 (6510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3
rect(l8 (8310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(4
rect(l8 (10110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(5
rect(l8 (11910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(6
rect(l8 (13710 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(7
rect(l8 (15510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(8
rect(l8 (17310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(9
rect(l8 (19110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(10
rect(l8 (20910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(11 name(FB)
rect(l8 (22710 3010) (180 180))
@@ -434,8 +434,8 @@ layout(
rect(l13 (-17921 -201) (2 2))
rect(l13 (-221 -201) (400 400))
rect(l13 (17740 -400) (400 400))
rect(l1 (-245 850) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-245 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(12 name(VDD)
rect(l3 (500 4500) (1400 3500))
@@ -457,19 +457,19 @@ layout(
rect(l11 (-750 -1450) (300 1400))
rect(l11 (-101 -351) (2 2))
rect(l11 (549 -401) (600 800))
rect(l1 (-23025 -2550) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l1 (1275 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l2 (-23025 -2550) (425 1500))
rect(l2 (-400 -1500) (425 1500))
rect(l2 (1275 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l9 (-21975 -450) (500 1500))
rect(l9 (22900 -1500) (500 1500))
)
@@ -478,8 +478,8 @@ layout(
rect(l12 (-260 -260) (200 200))
rect(l13 (-101 -101) (2 2))
rect(l13 (-201 -201) (400 400))
rect(l1 (-625 850) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-625 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(14 name(ENABLE)
rect(l8 (2510 3010) (180 180))
@@ -504,18 +504,18 @@ layout(
rect(l11 (-750 -1450) (1200 800))
rect(l11 (-551 -401) (2 2))
rect(l11 (549 -401) (600 800))
rect(l5 (-23700 460) (425 950))
rect(l5 (1975 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l6 (-23700 460) (425 950))
rect(l6 (1975 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l10 (-21975 -2210) (500 1500))
rect(l10 (22900 -1500) (500 1500))
)
@@ -905,8 +905,8 @@ xref(
pin(5 5 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(1 1 match)
)
)
circuit(ND2X1 ND2X1 match
@@ -926,10 +926,10 @@ xref(
pin(6 6 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(3 3 match)
device(4 4 match)
device(1 1 match)
device(2 2 match)
)
)
circuit(RINGO RINGO match
@@ -954,10 +954,6 @@ xref(
pin(2 4 match)
pin(1 1 match)
pin(4 0 match)
circuit(1 1 match)
circuit(10 10 match)
circuit(11 11 match)
circuit(12 12 match)
circuit(2 2 match)
circuit(3 3 match)
circuit(4 4 match)
@@ -966,6 +962,10 @@ xref(
circuit(7 7 match)
circuit(8 8 match)
circuit(9 9 match)
circuit(10 10 match)
circuit(11 11 match)
circuit(12 12 match)
circuit(1 1 match)
)
)
)
testdata/lvs/ringo_simple_same_device_classes.lvsdb.2
Vendored
+86 -86
View File
@@ -16,22 +16,22 @@ layout(
layer(l12 '10/0')
layer(l13 '11/0')
layer(l7)
layer(l1)
layer(l2)
layer(l9)
layer(l5)
layer(l6)
layer(l10)
# Mask layer connectivity
connect(l3 l3 l9)
connect(l4 l4 l8)
connect(l8 l4 l8 l11 l1 l9 l5 l10)
connect(l8 l4 l8 l11 l2 l9 l6 l10)
connect(l11 l8 l11 l12)
connect(l12 l11 l12 l13)
connect(l13 l12 l13)
connect(l7 l7)
connect(l1 l8 l1)
connect(l2 l8 l2)
connect(l9 l3 l8 l9)
connect(l5 l8 l5)
connect(l6 l8 l6)
connect(l10 l8 l10)
# Global nets and connectivity
@@ -46,13 +46,13 @@ layout(
# Device abstracts list the pin shapes of the devices.
device(D$PM PM
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (450 1500))
rect(l2 (125 -750) (450 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -60,13 +60,13 @@ layout(
)
device(D$PM$1 PM
terminal(S
rect(l1 (-575 -750) (450 1500))
rect(l2 (-575 -750) (450 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -74,13 +74,13 @@ layout(
)
device(D$PM$2 PM
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -88,13 +88,13 @@ layout(
)
device(D$NM NM
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (450 950))
rect(l6 (125 -475) (450 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -102,13 +102,13 @@ layout(
)
device(D$NM$1 NM
terminal(S
rect(l5 (-575 -475) (450 950))
rect(l6 (-575 -475) (450 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -116,13 +116,13 @@ layout(
)
device(D$NM$2 NM
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -144,8 +144,8 @@ layout(
rect(l11 (-240 -790) (300 1700))
rect(l11 (-1350 0) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l1 (-276 -2151) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l2 (-276 -2151) (425 1500))
rect(l2 (-400 -1500) (425 1500))
)
net(2 name(OUT)
rect(l8 (1810 1770) (180 180))
@@ -163,9 +163,9 @@ layout(
rect(l11 (-1751 1099) (300 1400))
rect(l11 (1100 -1700) (300 300))
rect(l11 (-300 0) (300 1400))
rect(l1 (-375 -1450) (425 1500))
rect(l1 (-1800 -1500) (425 1500))
rect(l5 (950 -4890) (425 950))
rect(l2 (-375 -1450) (425 1500))
rect(l2 (-1800 -1500) (425 1500))
rect(l6 (950 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -173,7 +173,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l5 (-951 859) (425 950))
rect(l6 (-951 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2600 3500))
@@ -200,8 +200,8 @@ layout(
)
net(7 name(SUBSTRATE))
net(8
rect(l5 (975 1660) (425 950))
rect(l5 (-400 -950) (425 950))
rect(l6 (975 1660) (425 950))
rect(l6 (-400 -950) (425 950))
)
# Outgoing pins and their connections to nets
@@ -282,7 +282,7 @@ layout(
rect(l11 (-650 300) (1800 800))
rect(l11 (-1450 -1100) (300 300))
rect(l11 (299 399) (2 2))
rect(l1 (-651 -2151) (425 1500))
rect(l2 (-651 -2151) (425 1500))
)
net(2 name(OUT)
rect(l8 (1110 5160) (180 180))
@@ -292,8 +292,8 @@ layout(
rect(l8 (-180 370) (180 180))
rect(l11 (-240 -790) (300 4790))
rect(l11 (-151 -2501) (2 2))
rect(l1 (-226 1049) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-226 1049) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -301,7 +301,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (1800 800))
rect(l11 (-851 -401) (2 2))
rect(l5 (-651 859) (425 950))
rect(l6 (-651 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2000 3500))
@@ -364,63 +364,63 @@ layout(
net(1
rect(l8 (4710 3010) (180 180))
rect(l11 (-850 -240) (610 300))
rect(l1 (-1175 1800) (425 1500))
rect(l1 (-1800 -1500) (425 1500))
rect(l5 (950 -4890) (425 950))
rect(l2 (-1175 1800) (425 1500))
rect(l2 (-1800 -1500) (425 1500))
rect(l6 (950 -4890) (425 950))
)
net(2
rect(l8 (6510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3
rect(l8 (8310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(4
rect(l8 (10110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(5
rect(l8 (11910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(6
rect(l8 (13710 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(7
rect(l8 (15510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(8
rect(l8 (17310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(9
rect(l8 (19110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(10
rect(l8 (20910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(11 name(FB)
rect(l8 (22710 3010) (180 180))
@@ -434,8 +434,8 @@ layout(
rect(l13 (-17921 -201) (2 2))
rect(l13 (-221 -201) (400 400))
rect(l13 (17740 -400) (400 400))
rect(l1 (-245 850) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-245 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(12 name(VDD)
rect(l3 (500 4500) (1400 3500))
@@ -457,19 +457,19 @@ layout(
rect(l11 (-750 -1450) (300 1400))
rect(l11 (-101 -351) (2 2))
rect(l11 (549 -401) (600 800))
rect(l1 (-23025 -2550) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l1 (1275 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l2 (-23025 -2550) (425 1500))
rect(l2 (-400 -1500) (425 1500))
rect(l2 (1275 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l9 (-21975 -450) (500 1500))
rect(l9 (22900 -1500) (500 1500))
)
@@ -478,8 +478,8 @@ layout(
rect(l12 (-260 -260) (200 200))
rect(l13 (-101 -101) (2 2))
rect(l13 (-201 -201) (400 400))
rect(l1 (-625 850) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-625 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(14 name(ENABLE)
rect(l8 (2510 3010) (180 180))
@@ -504,18 +504,18 @@ layout(
rect(l11 (-750 -1450) (1200 800))
rect(l11 (-551 -401) (2 2))
rect(l11 (549 -401) (600 800))
rect(l5 (-23700 460) (425 950))
rect(l5 (1975 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l6 (-23700 460) (425 950))
rect(l6 (1975 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l10 (-21975 -2210) (500 1500))
rect(l10 (22900 -1500) (500 1500))
)
@@ -905,8 +905,8 @@ xref(
pin(5 5 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(1 1 match)
)
)
circuit(ND2X1 ND2X1 match
@@ -926,10 +926,10 @@ xref(
pin(6 6 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(3 3 match)
device(4 4 match)
device(1 1 match)
device(2 2 match)
)
)
circuit(RINGO RINGO match
@@ -954,10 +954,6 @@ xref(
pin(2 4 match)
pin(1 1 match)
pin(4 0 match)
circuit(1 1 match)
circuit(10 10 match)
circuit(11 11 match)
circuit(12 12 match)
circuit(2 2 match)
circuit(3 3 match)
circuit(4 4 match)
@@ -966,6 +962,10 @@ xref(
circuit(7 7 match)
circuit(8 8 match)
circuit(9 9 match)
circuit(10 10 match)
circuit(11 11 match)
circuit(12 12 match)
circuit(1 1 match)
)
)
)
testdata/lvs/ringo_simple_simplification.lvsdb.1
Vendored
+115 -95
View File
@@ -16,22 +16,22 @@ layout(
layer(l12 '10/0')
layer(l13 '11/0')
layer(l7)
layer(l1)
layer(l2)
layer(l9)
layer(l5)
layer(l6)
layer(l10)
# Mask layer connectivity
connect(l3 l3 l9)
connect(l4 l4 l8)
connect(l8 l4 l8 l11 l1 l9 l5 l10)
connect(l8 l4 l8 l11 l2 l9 l6 l10)
connect(l11 l8 l11 l12)
connect(l12 l11 l12 l13)
connect(l13 l12 l13)
connect(l7 l7)
connect(l1 l8 l1)
connect(l2 l8 l2)
connect(l9 l3 l8 l9)
connect(l5 l8 l5)
connect(l6 l8 l6)
connect(l10 l8 l10)
# Global nets and connectivity
@@ -46,13 +46,13 @@ layout(
# Device abstracts list the pin shapes of the devices.
device(D$PMOS PMOS
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (450 1500))
rect(l2 (125 -750) (450 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -60,13 +60,13 @@ layout(
)
device(D$PMOS$1 PMOS
terminal(S
rect(l1 (-575 -750) (450 1500))
rect(l2 (-575 -750) (450 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -74,13 +74,13 @@ layout(
)
device(D$PMOS$2 PMOS
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -88,13 +88,13 @@ layout(
)
device(D$NMOS NMOS
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (450 950))
rect(l6 (125 -475) (450 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -102,13 +102,13 @@ layout(
)
device(D$NMOS$1 NMOS
terminal(S
rect(l5 (-575 -475) (450 950))
rect(l6 (-575 -475) (450 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -116,13 +116,13 @@ layout(
)
device(D$NMOS$2 NMOS
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -144,8 +144,8 @@ layout(
rect(l11 (-240 -790) (300 1700))
rect(l11 (-1350 0) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l1 (-276 -2151) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l2 (-276 -2151) (425 1500))
rect(l2 (-400 -1500) (425 1500))
)
net(2 name(OUT)
rect(l8 (1810 1770) (180 180))
@@ -163,9 +163,9 @@ layout(
rect(l11 (-1751 1099) (300 1400))
rect(l11 (1100 -1700) (300 300))
rect(l11 (-300 0) (300 1400))
rect(l1 (-1750 -1450) (425 1500))
rect(l1 (950 -1500) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1750 -1450) (425 1500))
rect(l2 (950 -1500) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -173,7 +173,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l5 (-951 859) (425 950))
rect(l6 (-951 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2600 3500))
@@ -200,8 +200,8 @@ layout(
)
net(7 name(SUBSTRATE))
net(8
rect(l5 (975 1660) (425 950))
rect(l5 (-400 -950) (425 950))
rect(l6 (975 1660) (425 950))
rect(l6 (-400 -950) (425 950))
)
# Outgoing pins and their connections to nets
@@ -282,7 +282,7 @@ layout(
rect(l11 (-650 300) (1800 800))
rect(l11 (-1450 -1100) (300 300))
rect(l11 (299 399) (2 2))
rect(l1 (-651 -2151) (425 1500))
rect(l2 (-651 -2151) (425 1500))
)
net(2 name(OUT)
rect(l8 (1110 5160) (180 180))
@@ -292,8 +292,8 @@ layout(
rect(l8 (-180 370) (180 180))
rect(l11 (-240 -790) (300 4790))
rect(l11 (-151 -2501) (2 2))
rect(l1 (-226 1049) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-226 1049) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -301,7 +301,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (1800 800))
rect(l11 (-851 -401) (2 2))
rect(l5 (-651 859) (425 950))
rect(l6 (-651 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2000 3500))
@@ -389,8 +389,8 @@ layout(
rect(l11 (1100 -300) (300 300))
rect(l11 (-1101 399) (2 2))
rect(l11 (799 -2101) (300 1400))
rect(l1 (-1750 -1450) (425 1500))
rect(l1 (950 -1500) (425 1500))
rect(l2 (-1750 -1450) (425 1500))
rect(l2 (950 -1500) (425 1500))
)
net(3 name(OUT)
rect(l8 (1110 5160) (180 180))
@@ -400,10 +400,10 @@ layout(
rect(l8 (-180 370) (180 180))
rect(l11 (-240 -790) (300 4790))
rect(l11 (-151 -2501) (2 2))
rect(l1 (-226 1049) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l5 (-450 -4890) (425 950))
rect(l5 (-400 -950) (425 950))
rect(l2 (-226 1049) (425 1500))
rect(l2 (-400 -1500) (425 1500))
rect(l6 (-450 -4890) (425 950))
rect(l6 (-400 -950) (425 950))
)
net(4 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -414,8 +414,8 @@ layout(
rect(l11 (-650 -2160) (2400 800))
rect(l11 (-650 0) (300 1360))
rect(l11 (-1101 -1761) (2 2))
rect(l5 (-651 859) (425 950))
rect(l5 (950 -950) (425 950))
rect(l6 (-651 859) (425 950))
rect(l6 (950 -950) (425 950))
)
net(5
rect(l3 (-100 4500) (2600 3500))
@@ -486,27 +486,27 @@ layout(
net(1
rect(l8 (4710 3010) (180 180))
rect(l11 (-850 -240) (610 300))
rect(l1 (-2550 1800) (425 1500))
rect(l1 (950 -1500) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-2550 1800) (425 1500))
rect(l2 (950 -1500) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(2
rect(l8 (6510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3
rect(l8 (19110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(4
rect(l8 (20910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(5 name(FB)
rect(l8 (22710 3010) (180 180))
@@ -520,8 +520,8 @@ layout(
rect(l13 (-17921 -201) (2 2))
rect(l13 (-221 -201) (400 400))
rect(l13 (17740 -400) (400 400))
rect(l1 (-245 850) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-245 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(6 name(VDD)
rect(l3 (1100 4500) (1400 3500))
@@ -543,20 +543,20 @@ layout(
rect(l11 (-750 -1450) (300 1400))
rect(l11 (-101 -351) (2 2))
rect(l11 (549 -401) (600 800))
rect(l1 (-23625 -2550) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l1 (1275 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (3175 -1500) (425 1500))
rect(l1 (-2225 -1500) (425 1500))
rect(l1 (3175 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (3175 -1500) (425 1500))
rect(l1 (950 -1500) (425 1500))
rect(l1 (-3600 -1500) (425 1500))
rect(l2 (-23625 -2550) (425 1500))
rect(l2 (-400 -1500) (425 1500))
rect(l2 (1275 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (3175 -1500) (425 1500))
rect(l2 (-2225 -1500) (425 1500))
rect(l2 (3175 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (3175 -1500) (425 1500))
rect(l2 (950 -1500) (425 1500))
rect(l2 (-3600 -1500) (425 1500))
rect(l9 (-19575 -450) (500 1500))
rect(l9 (22900 -1500) (500 1500))
)
@@ -565,10 +565,10 @@ layout(
rect(l12 (-260 -260) (200 200))
rect(l13 (-101 -101) (2 2))
rect(l13 (-201 -201) (400 400))
rect(l1 (-625 850) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l5 (-450 -4890) (425 950))
rect(l5 (-400 -950) (425 950))
rect(l2 (-625 850) (425 1500))
rect(l2 (-400 -1500) (425 1500))
rect(l6 (-450 -4890) (425 950))
rect(l6 (-400 -950) (425 950))
)
net(8 name(ENABLE)
rect(l8 (2510 3010) (180 180))
@@ -593,38 +593,58 @@ layout(
rect(l11 (-750 -1450) (1200 800))
rect(l11 (-551 -401) (2 2))
rect(l11 (549 -401) (600 800))
rect(l5 (-24300 460) (425 950))
rect(l5 (1975 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (3175 -950) (425 950))
rect(l5 (-2225 -950) (425 950))
rect(l5 (3175 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (3175 -950) (425 950))
rect(l5 (950 -950) (425 950))
rect(l5 (-3600 -950) (425 950))
rect(l6 (-24300 460) (425 950))
rect(l6 (1975 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (3175 -950) (425 950))
rect(l6 (-2225 -950) (425 950))
rect(l6 (3175 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (3175 -950) (425 950))
rect(l6 (950 -950) (425 950))
rect(l6 (-3600 -950) (425 950))
rect(l10 (-19575 -2210) (500 1500))
rect(l10 (22900 -1500) (500 1500))
)
net(10
rect(l8 (8310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(11
rect(l8 (17310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(12
rect(l8 (10110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(13
rect(l8 (11910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(14
rect(l8 (13710 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(15
rect(l8 (15510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(12)
net(13)
net(14)
net(15)
# Outgoing pins and their connections to nets
pin(5 name(FB))
@@ -1058,8 +1078,8 @@ xref(
pin(5 5 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(1 1 match)
)
)
circuit(INVX2 INVX2 match
@@ -1076,8 +1096,8 @@ xref(
pin(5 5 match)
pin(1 0 match)
pin(3 2 match)
device(1 1 match)
device(3 2 match)
device(1 1 match)
)
)
circuit(ND2X1 ND2X1 match
@@ -1097,10 +1117,10 @@ xref(
pin(6 6 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(3 3 match)
device(4 4 match)
device(1 1 match)
device(2 2 match)
)
)
circuit(RINGO RINGO match
@@ -1125,10 +1145,6 @@ xref(
pin(2 4 match)
pin(1 1 match)
pin(4 0 match)
circuit(1 1 match)
circuit(5 10 match)
circuit(6 11 match)
circuit(7 12 match)
circuit(2 2 match)
circuit(3 3 match)
circuit(17 4 match)
@@ -1137,6 +1153,10 @@ xref(
circuit(20 7 match)
circuit(21 8 match)
circuit(4 9 match)
circuit(5 10 match)
circuit(6 11 match)
circuit(7 12 match)
circuit(1 1 match)
)
)
)
testdata/lvs/ringo_simple_simplification.lvsdb.2
Vendored
+115 -95
View File
@@ -16,22 +16,22 @@ layout(
layer(l12 '10/0')
layer(l13 '11/0')
layer(l7)
layer(l1)
layer(l2)
layer(l9)
layer(l5)
layer(l6)
layer(l10)
# Mask layer connectivity
connect(l3 l3 l9)
connect(l4 l4 l8)
connect(l8 l4 l8 l11 l1 l9 l5 l10)
connect(l8 l4 l8 l11 l2 l9 l6 l10)
connect(l11 l8 l11 l12)
connect(l12 l11 l12 l13)
connect(l13 l12 l13)
connect(l7 l7)
connect(l1 l8 l1)
connect(l2 l8 l2)
connect(l9 l3 l8 l9)
connect(l5 l8 l5)
connect(l6 l8 l6)
connect(l10 l8 l10)
# Global nets and connectivity
@@ -46,13 +46,13 @@ layout(
# Device abstracts list the pin shapes of the devices.
device(D$PMOS PMOS
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (450 1500))
rect(l2 (125 -750) (450 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -60,13 +60,13 @@ layout(
)
device(D$PMOS$1 PMOS
terminal(S
rect(l1 (-575 -750) (450 1500))
rect(l2 (-575 -750) (450 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -74,13 +74,13 @@ layout(
)
device(D$PMOS$2 PMOS
terminal(S
rect(l1 (-550 -750) (425 1500))
rect(l2 (-550 -750) (425 1500))
)
terminal(G
rect(l4 (-125 -750) (250 1500))
)
terminal(D
rect(l1 (125 -750) (425 1500))
rect(l2 (125 -750) (425 1500))
)
terminal(B
rect(l3 (-125 -750) (250 1500))
@@ -88,13 +88,13 @@ layout(
)
device(D$NMOS NMOS
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (450 950))
rect(l6 (125 -475) (450 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -102,13 +102,13 @@ layout(
)
device(D$NMOS$1 NMOS
terminal(S
rect(l5 (-575 -475) (450 950))
rect(l6 (-575 -475) (450 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -116,13 +116,13 @@ layout(
)
device(D$NMOS$2 NMOS
terminal(S
rect(l5 (-550 -475) (425 950))
rect(l6 (-550 -475) (425 950))
)
terminal(G
rect(l4 (-125 -475) (250 950))
)
terminal(D
rect(l5 (125 -475) (425 950))
rect(l6 (125 -475) (425 950))
)
terminal(B
rect(l7 (-125 -475) (250 950))
@@ -144,8 +144,8 @@ layout(
rect(l11 (-240 -790) (300 1700))
rect(l11 (-1350 0) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l1 (-276 -2151) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l2 (-276 -2151) (425 1500))
rect(l2 (-400 -1500) (425 1500))
)
net(2 name(OUT)
rect(l8 (1810 1770) (180 180))
@@ -163,9 +163,9 @@ layout(
rect(l11 (-1751 1099) (300 1400))
rect(l11 (1100 -1700) (300 300))
rect(l11 (-300 0) (300 1400))
rect(l1 (-375 -1450) (425 1500))
rect(l1 (-1800 -1500) (425 1500))
rect(l5 (950 -4890) (425 950))
rect(l2 (-375 -1450) (425 1500))
rect(l2 (-1800 -1500) (425 1500))
rect(l6 (950 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -173,7 +173,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (2400 800))
rect(l11 (-1151 -401) (2 2))
rect(l5 (-951 859) (425 950))
rect(l6 (-951 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2600 3500))
@@ -200,8 +200,8 @@ layout(
)
net(7 name(SUBSTRATE))
net(8
rect(l5 (975 1660) (425 950))
rect(l5 (-400 -950) (425 950))
rect(l6 (975 1660) (425 950))
rect(l6 (-400 -950) (425 950))
)
# Outgoing pins and their connections to nets
@@ -282,7 +282,7 @@ layout(
rect(l11 (-650 300) (1800 800))
rect(l11 (-1450 -1100) (300 300))
rect(l11 (299 399) (2 2))
rect(l1 (-651 -2151) (425 1500))
rect(l2 (-651 -2151) (425 1500))
)
net(2 name(OUT)
rect(l8 (1110 5160) (180 180))
@@ -292,8 +292,8 @@ layout(
rect(l8 (-180 370) (180 180))
rect(l11 (-240 -790) (300 4790))
rect(l11 (-151 -2501) (2 2))
rect(l1 (-226 1049) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-226 1049) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -301,7 +301,7 @@ layout(
rect(l11 (-240 -1300) (300 1360))
rect(l11 (-650 -2160) (1800 800))
rect(l11 (-851 -401) (2 2))
rect(l5 (-651 859) (425 950))
rect(l6 (-651 859) (425 950))
)
net(4
rect(l3 (-100 4500) (2000 3500))
@@ -389,8 +389,8 @@ layout(
rect(l11 (1100 -300) (300 300))
rect(l11 (-1101 399) (2 2))
rect(l11 (799 -2101) (300 1400))
rect(l1 (-375 -1450) (425 1500))
rect(l1 (-1800 -1500) (425 1500))
rect(l2 (-375 -1450) (425 1500))
rect(l2 (-1800 -1500) (425 1500))
)
net(3 name(OUT)
rect(l8 (1110 5160) (180 180))
@@ -400,10 +400,10 @@ layout(
rect(l8 (-180 370) (180 180))
rect(l11 (-240 -790) (300 4790))
rect(l11 (-151 -2501) (2 2))
rect(l1 (-226 1049) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l5 (-450 -4890) (425 950))
rect(l5 (-400 -950) (425 950))
rect(l2 (-226 1049) (425 1500))
rect(l2 (-400 -1500) (425 1500))
rect(l6 (-450 -4890) (425 950))
rect(l6 (-400 -950) (425 950))
)
net(4 name(VSS)
rect(l8 (410 1770) (180 180))
@@ -414,8 +414,8 @@ layout(
rect(l11 (-650 -2160) (2400 800))
rect(l11 (-650 0) (300 1360))
rect(l11 (-1101 -1761) (2 2))
rect(l5 (724 859) (425 950))
rect(l5 (-1800 -950) (425 950))
rect(l6 (724 859) (425 950))
rect(l6 (-1800 -950) (425 950))
)
net(5
rect(l3 (-100 4500) (2600 3500))
@@ -486,27 +486,27 @@ layout(
net(1
rect(l8 (4710 3010) (180 180))
rect(l11 (-850 -240) (610 300))
rect(l1 (-1175 1800) (425 1500))
rect(l1 (-1800 -1500) (425 1500))
rect(l5 (950 -4890) (425 950))
rect(l2 (-1175 1800) (425 1500))
rect(l2 (-1800 -1500) (425 1500))
rect(l6 (950 -4890) (425 950))
)
net(2
rect(l8 (6510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(3
rect(l8 (19110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(4
rect(l8 (20910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(5 name(FB)
rect(l8 (22710 3010) (180 180))
@@ -520,8 +520,8 @@ layout(
rect(l13 (-17921 -201) (2 2))
rect(l13 (-221 -201) (400 400))
rect(l13 (17740 -400) (400 400))
rect(l1 (-245 850) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-245 850) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(6 name(VDD)
rect(l3 (1100 4500) (1400 3500))
@@ -543,20 +543,20 @@ layout(
rect(l11 (-750 -1450) (300 1400))
rect(l11 (-101 -351) (2 2))
rect(l11 (549 -401) (600 800))
rect(l1 (-23625 -2550) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l1 (1275 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (3175 -1500) (425 1500))
rect(l1 (-2225 -1500) (425 1500))
rect(l1 (3175 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (1375 -1500) (425 1500))
rect(l1 (4550 -1500) (425 1500))
rect(l1 (-1800 -1500) (425 1500))
rect(l1 (-2225 -1500) (425 1500))
rect(l2 (-23625 -2550) (425 1500))
rect(l2 (-400 -1500) (425 1500))
rect(l2 (1275 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (3175 -1500) (425 1500))
rect(l2 (-2225 -1500) (425 1500))
rect(l2 (3175 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (1375 -1500) (425 1500))
rect(l2 (4550 -1500) (425 1500))
rect(l2 (-1800 -1500) (425 1500))
rect(l2 (-2225 -1500) (425 1500))
rect(l9 (-19575 -450) (500 1500))
rect(l9 (22900 -1500) (500 1500))
)
@@ -565,10 +565,10 @@ layout(
rect(l12 (-260 -260) (200 200))
rect(l13 (-101 -101) (2 2))
rect(l13 (-201 -201) (400 400))
rect(l1 (-625 850) (425 1500))
rect(l1 (-400 -1500) (425 1500))
rect(l5 (-450 -4890) (425 950))
rect(l5 (-400 -950) (425 950))
rect(l2 (-625 850) (425 1500))
rect(l2 (-400 -1500) (425 1500))
rect(l6 (-450 -4890) (425 950))
rect(l6 (-400 -950) (425 950))
)
net(8 name(ENABLE)
rect(l8 (2510 3010) (180 180))
@@ -593,38 +593,58 @@ layout(
rect(l11 (-750 -1450) (1200 800))
rect(l11 (-551 -401) (2 2))
rect(l11 (549 -401) (600 800))
rect(l5 (-24300 460) (425 950))
rect(l5 (1975 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (3175 -950) (425 950))
rect(l5 (-2225 -950) (425 950))
rect(l5 (3175 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (1375 -950) (425 950))
rect(l5 (4550 -950) (425 950))
rect(l5 (-1800 -950) (425 950))
rect(l5 (-2225 -950) (425 950))
rect(l6 (-24300 460) (425 950))
rect(l6 (1975 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (3175 -950) (425 950))
rect(l6 (-2225 -950) (425 950))
rect(l6 (3175 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (1375 -950) (425 950))
rect(l6 (4550 -950) (425 950))
rect(l6 (-1800 -950) (425 950))
rect(l6 (-2225 -950) (425 950))
rect(l10 (-19575 -2210) (500 1500))
rect(l10 (22900 -1500) (500 1500))
)
net(10
rect(l8 (8310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(11
rect(l8 (17310 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l1 (-1275 1800) (425 1500))
rect(l5 (-425 -4890) (425 950))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(12
rect(l8 (10110 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(13
rect(l8 (11910 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(14
rect(l8 (13710 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(15
rect(l8 (15510 3010) (180 180))
rect(l11 (-1140 -240) (900 300))
rect(l2 (-1275 1800) (425 1500))
rect(l6 (-425 -4890) (425 950))
)
net(12)
net(13)
net(14)
net(15)
# Outgoing pins and their connections to nets
pin(5 name(FB))
@@ -1058,8 +1078,8 @@ xref(
pin(5 5 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(1 1 match)
)
)
circuit(INVX2 INVX2 match
@@ -1076,8 +1096,8 @@ xref(
pin(5 5 match)
pin(1 0 match)
pin(3 2 match)
device(1 1 match)
device(3 2 match)
device(1 1 match)
)
)
circuit(ND2X1 ND2X1 match
@@ -1097,10 +1117,10 @@ xref(
pin(6 6 match)
pin(0 0 match)
pin(2 2 match)
device(1 1 match)
device(2 2 match)
device(3 3 match)
device(4 4 match)
device(1 1 match)
device(2 2 match)
)
)
circuit(RINGO RINGO match
@@ -1125,10 +1145,6 @@ xref(
pin(2 4 match)
pin(1 1 match)
pin(4 0 match)
circuit(1 1 match)
circuit(5 10 match)
circuit(6 11 match)
circuit(7 12 match)
circuit(2 2 match)
circuit(3 3 match)
circuit(17 4 match)
@@ -1137,6 +1153,10 @@ xref(
circuit(20 7 match)
circuit(21 8 match)
circuit(4 9 match)
circuit(5 10 match)
circuit(6 11 match)
circuit(7 12 match)
circuit(1 1 match)
)
)
)
testdata/lvs/ringo_simple_simplification_with_align.cir
Vendored
+102
View File
@@ -0,0 +1,102 @@
* Extracted by KLayout
* cell RINGO
* pin FB
* pin VDD
* pin OUT
* pin ENABLE
* pin VSS
.SUBCKT RINGO 5 6 7 8 9
* net 5 FB
* net 6 VDD
* net 7 OUT
* net 8 ENABLE
* net 9 VSS
* cell instance $1 r0 *1 1.8,0
X$1 6 1 9 6 5 8 9 ND2X1
* cell instance $2 r0 *1 4.2,0
X$2 6 2 9 6 1 9 INVX1
* cell instance $3 r0 *1 6,0
X$3 6 10 9 6 2 9 INVX1
* cell instance $4 r0 *1 16.8,0
X$4 6 3 9 6 11 9 INVX1
* cell instance $5 r0 *1 18.6,0
X$5 6 4 9 6 3 9 INVX1
* cell instance $6 r0 *1 20.4,0
X$6 6 5 9 6 4 9 INVX1
* cell instance $7 r0 *1 22.2,0
X$7 5 6 7 9 6 9 INVX2
* cell instance $17 r0 *1 7.8,0
X$17 6 12 9 6 10 9 INVX1
* cell instance $18 r0 *1 9.6,0
X$18 6 13 9 6 12 9 INVX1
* cell instance $19 r0 *1 11.4,0
X$19 6 14 9 6 13 9 INVX1
* cell instance $20 r0 *1 13.2,0
X$20 6 15 9 6 14 9 INVX1
* cell instance $21 r0 *1 15,0
X$21 6 11 9 6 15 9 INVX1
.ENDS RINGO
* cell INVX2
* pin IN
* pin VDD
* pin OUT
* pin VSS
* pin
* pin SUBSTRATE
.SUBCKT INVX2 1 2 3 4 5 6
* net 1 IN
* net 2 VDD
* net 3 OUT
* net 4 VSS
* net 6 SUBSTRATE
* device instance $1 r0 *1 0.85,5.8 PMOS
M$1 2 1 3 5 PMOS L=0.25U W=3U AS=0.975P AD=0.975P PS=5.8U PD=5.8U
* device instance $3 r0 *1 0.85,2.135 NMOS
M$3 4 1 3 6 NMOS L=0.25U W=1.9U AS=0.6175P AD=0.6175P PS=4.15U PD=4.15U
.ENDS INVX2
* cell INVX1
* pin VDD
* pin OUT
* pin VSS
* pin
* pin IN
* pin SUBSTRATE
.SUBCKT INVX1 1 2 3 4 5 6
* net 1 VDD
* net 2 OUT
* net 3 VSS
* net 5 IN
* net 6 SUBSTRATE
* device instance $1 r0 *1 0.85,5.8 PMOS
M$1 1 5 2 4 PMOS L=0.25U W=1.5U AS=0.6375P AD=0.6375P PS=3.85U PD=3.85U
* device instance $2 r0 *1 0.85,2.135 NMOS
M$2 3 5 2 6 NMOS L=0.25U W=0.95U AS=0.40375P AD=0.40375P PS=2.75U PD=2.75U
.ENDS INVX1
* cell ND2X1
* pin VDD
* pin OUT
* pin VSS
* pin
* pin B
* pin A
* pin SUBSTRATE
.SUBCKT ND2X1 1 2 3 4 5 6 7
* net 1 VDD
* net 2 OUT
* net 3 VSS
* net 5 B
* net 6 A
* net 7 SUBSTRATE
* device instance $1 r0 *1 0.85,5.8 PMOS
M$1 2 6 1 4 PMOS L=0.25U W=1.5U AS=0.6375P AD=0.3375P PS=3.85U PD=1.95U
* device instance $2 r0 *1 1.55,5.8 PMOS
M$2 1 5 2 4 PMOS L=0.25U W=1.5U AS=0.3375P AD=0.6375P PS=1.95U PD=3.85U
* device instance $3 r0 *1 0.85,2.135 NMOS
M$3 3 6 8 7 NMOS L=0.25U W=0.95U AS=0.40375P AD=0.21375P PS=2.75U PD=1.4U
* device instance $4 r0 *1 1.55,2.135 NMOS
M$4 8 5 2 7 NMOS L=0.25U W=0.95U AS=0.21375P AD=0.40375P PS=1.4U PD=2.75U
.ENDS ND2X1
testdata/lvs/ringo_simple_simplification_with_align.lvs
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source($lvs_test_source, "RINGO")
report_lvs($lvs_test_target_lvsdb, true)
target_netlist($lvs_test_target_cir, write_spice, "Extracted by KLayout")
schematic("ringo_for_simplification.cir")
deep
# Drawing layers
nwell = input(1, 0)
active = input(2, 0)
pplus = input(3, 0)
nplus = input(4, 0)
poly = input(5, 0)
contact = input(8, 0)
metal1 = input(9, 0)
via1 = input(10, 0)
metal2 = input(11, 0)
# Bulk layer for terminal provisioning
bulk = polygon_layer
# Computed layers
active_in_nwell = active & nwell
pactive = active_in_nwell & pplus
pgate = pactive & poly
psd = pactive - pgate
ntie = active_in_nwell & nplus
active_outside_nwell = active - nwell
nactive = active_outside_nwell & nplus
ngate = nactive & poly
nsd = nactive - ngate
ptie = active_outside_nwell & pplus
# Device extraction
# PMOS transistor device extraction
extract_devices(mos4("PMOS"), { "SD" => psd, "G" => pgate, "W" => nwell,
"tS" => psd, "tD" => psd, "tG" => poly, "tW" => nwell })
# NMOS transistor device extraction
extract_devices(mos4("NMOS"), { "SD" => nsd, "G" => ngate, "W" => bulk,
"tS" => nsd, "tD" => nsd, "tG" => poly, "tW" => bulk })
# Define connectivity for netlist extraction
# Inter-layer
connect(psd, contact)
connect(nsd, contact)
connect(poly, contact)
connect(ntie, contact)
connect(nwell, ntie)
connect(ptie, contact)
connect(contact, metal1)
connect(metal1, via1)
connect(via1, metal2)
# Global
connect_global(bulk, "SUBSTRATE")
connect_global(ptie, "SUBSTRATE")
# Compare section
align
netlist.simplify
compare
testdata/lvs/ringo_simple_simplification_with_align.lvsdb.1
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testdata/lvs/ringo_simple_simplification_with_align.lvsdb.2
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testdata/lvs/vexriscv_align.lvs
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source($lvs_test_source)
# will get pretty big:
# report_lvs($lvs_test_target_lvsdb, true)
target_netlist($lvs_test_target_cir, write_spice(true), "Extracted by KLayout")
schematic("vexriscv_schematic.cir.gz")
deep
# Drawing layers
nwell = input(1, 0)
pactive = input(4, 0)
nactive = input(3, 0)
ntie = input(5, 0)
ptie = input(6, 0)
poly = input(7, 0)
cont = input(10, 0)
metal1 = input(11, 0)
via1 = input(14, 0)
metal2 = input(16, 0)
via2 = input(18, 0)
metal3 = input(19, 0)
via3 = input(21, 0)
metal4 = input(22, 0)
via4 = input(25, 0)
metal5 = input(26, 0)
# Bulk layer for terminal provisioning
bulk = polygon_layer
# Computed layers
poly_cont = cont & poly
diff_cont = cont - poly
pgate = pactive & poly
psd = pactive - pgate
ngate = nactive & poly
nsd = nactive - ngate
# Device extraction
# PMOS transistor device extraction
extract_devices(mos4("PMOS"), { "SD" => psd, "G" => pgate, "W" => nwell,
"tS" => psd, "tD" => psd, "tG" => poly, "tW" => nwell })
# NMOS transistor device extraction
extract_devices(mos4("NMOS"), { "SD" => nsd, "G" => ngate, "W" => bulk,
"tS" => nsd, "tD" => nsd, "tG" => poly, "tW" => bulk })
# Define connectivity for netlist extraction
# Inter-layer
connect(psd, diff_cont)
connect(nsd, diff_cont)
connect(poly, poly_cont)
connect(poly_cont, metal1)
connect(diff_cont, metal1)
connect(diff_cont, ntie)
connect(diff_cont, ptie)
connect(nwell, ntie)
connect(metal1, via1)
connect(via1, metal2)
connect(metal2, via2)
connect(via2, metal3)
connect(metal3, via3)
connect(via3, metal4)
connect(metal4, via4)
connect(via4, metal5)
# Global
connect_global(ptie, "BULK")
connect_global(bulk, "BULK")
# Implicit
connect_implicit("VDD")
connect_implicit("VSS")
# Compare section
same_device_classes("PMOS", "TP")
same_device_classes("NMOS", "TN")
# Ignore all caps from the schematic
same_device_classes(nil, "CAP")
# Increase the default complexity from 100 to 200
# This is required because the clock tree is incorrect and exhibits manifold ambiguities
# (the netlists are just samples, not necessarily functional).
# The algorithm needs enough freedom to follow all these branches and different variants.
max_branch_complexity(200)
schematic.combine_devices
netlist.combine_devices
align
if ! compare
raise "Netlists don't match"
else
puts "Congratulations! Netlists match."
end
testdata/ruby/dbNetlistCompare.rb
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@@ -954,8 +954,8 @@ match_pins $2 $0
match_pins $3 $2
match_devices $3 $1
match_devices_with_different_parameters $2 $2
device_mismatch (null) $3
match_devices $1 $4
device_mismatch (null) $3
end_circuit INV INV NOMATCH
END