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WIP: better reproducablility for .lvsdb layer names, updated tests.

This commit is contained in:
Matthias Koefferlein 2019-07-07 19:39:00 +02:00
parent 993ef78575
commit 95a1e38fe3
4 changed files with 156 additions and 154 deletions
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4
src/drc/drc/built-in-macros/_drc_netter.rb
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@ -67,6 +67,7 @@ module DRC
@netlisted = false @netlisted = false
@connect_implicit = [] @connect_implicit = []
@l2n = nil @l2n = nil
@lnum = 0
end end
# %DRC% # %DRC%
@ -404,9 +405,10 @@ module DRC
ensure_data ensure_data
@layers[id] = data @layers[id] = data
@lnum += 1
# every layer gets registered and intra-layer connections are made # every layer gets registered and intra-layer connections are made
@l2n.register(data, "l" + id.to_s) @l2n.register(data, "l" + @lnum.to_s)
end end

128
testdata/lvs/inv.lvsdb vendored
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@ -10,33 +10,33 @@ layout(
# Mask layers # Mask layers
layer(l3 'NWELL (1/0)') layer(l3 'NWELL (1/0)')
layer(l8 'POLY (5/0)') layer(l4 'POLY (5/0)')
layer(l9 'CONTACT (6/0)') layer(l8 'CONTACT (6/0)')
layer(l10 'METAL1 (7/0)') layer(l9 'METAL1 (7/0)')
layer(l11 'METAL1_LABEL (7/1)') layer(l10 'METAL1_LABEL (7/1)')
layer(l12 'VIA1 (8/0)') layer(l11 'VIA1 (8/0)')
layer(l13 'METAL2 (9/0)') layer(l12 'METAL2 (9/0)')
layer(l14 'METAL2_LABEL (9/1)') layer(l13 'METAL2_LABEL (9/1)')
layer(l15) layer(l7)
layer(l23) layer(l1)
layer(l31) layer(l5)
# Mask layer connectivity # Mask layer connectivity
connect(l3 l3) connect(l3 l3)
connect(l8 l8 l9) connect(l4 l4 l8)
connect(l9 l8 l9 l10 l23 l31) connect(l8 l4 l8 l9 l1 l5)
connect(l10 l9 l10 l11 l12) connect(l9 l8 l9 l10 l11)
connect(l11 l10 l11) connect(l10 l9 l10)
connect(l12 l10 l12 l13) connect(l11 l9 l11 l12)
connect(l13 l12 l13 l14) connect(l12 l11 l12 l13)
connect(l14 l13 l14) connect(l13 l12 l13)
connect(l15 l15) connect(l7 l7)
connect(l23 l9 l23) connect(l1 l8 l1)
connect(l31 l9 l31) connect(l5 l8 l5)
# Global nets and connectivity # Global nets and connectivity
global(l3 NWELL) global(l3 NWELL)
global(l15 SUBSTRATE) global(l7 SUBSTRATE)
# Device class section # Device class section
class(PMOS MOS4) class(PMOS MOS4)
@ -46,13 +46,13 @@ layout(
# Device abstracts list the pin shapes of the devices. # Device abstracts list the pin shapes of the devices.
device(D$PMOS PMOS device(D$PMOS PMOS
terminal(S terminal(S
rect(l23 (-575 -750) (450 1500)) rect(l1 (-575 -750) (450 1500))
) )
terminal(G terminal(G
rect(l8 (-125 -750) (250 1500)) rect(l4 (-125 -750) (250 1500))
) )
terminal(D terminal(D
rect(l23 (125 -750) (450 1500)) rect(l1 (125 -750) (450 1500))
) )
terminal(B terminal(B
rect(l3 (-125 -750) (250 1500)) rect(l3 (-125 -750) (250 1500))
@ -60,16 +60,16 @@ layout(
) )
device(D$NMOS NMOS device(D$NMOS NMOS
terminal(S terminal(S
rect(l31 (-575 -450) (450 900)) rect(l5 (-575 -450) (450 900))
) )
terminal(G terminal(G
rect(l8 (-125 -450) (250 900)) rect(l4 (-125 -450) (250 900))
) )
terminal(D terminal(D
rect(l31 (125 -450) (450 900)) rect(l5 (125 -450) (450 900))
) )
terminal(B terminal(B
rect(l15 (-125 -450) (250 900)) rect(l7 (-125 -450) (250 900))
) )
) )
@ -79,48 +79,48 @@ layout(
# Nets with their geometries # Nets with their geometries
net(1 name(IN) net(1 name(IN)
rect(l8 (900 50) (250 1050)) rect(l4 (900 50) (250 1050))
rect(l8 (-250 0) (250 3100)) rect(l4 (-250 0) (250 3100))
rect(l8 (-250 0) (250 1650)) rect(l4 (-250 0) (250 1650))
rect(l8 (-800 -3100) (550 400)) rect(l4 (-800 -3100) (550 400))
rect(l9 (-450 -300) (200 200)) rect(l8 (-450 -300) (200 200))
rect(l10 (-300 -300) (400 400)) rect(l9 (-300 -300) (400 400))
rect(l11 (-201 -201) (2 2)) rect(l10 (-201 -201) (2 2))
) )
net(2 name(VSS) net(2 name(VSS)
rect(l9 (550 300) (200 200)) rect(l8 (550 300) (200 200))
rect(l9 (-200 300) (200 200)) rect(l8 (-200 300) (200 200))
rect(l10 (-250 -950) (300 1050)) rect(l9 (-250 -950) (300 1050))
rect(l12 (-250 -950) (200 200)) rect(l11 (-250 -950) (200 200))
rect(l12 (-200 300) (200 200)) rect(l11 (-200 300) (200 200))
rect(l13 (-750 -850) (2000 1000)) rect(l12 (-750 -850) (2000 1000))
rect(l14 (-101 -851) (2 2)) rect(l13 (-101 -851) (2 2))
rect(l31 (-1451 49) (450 900)) rect(l5 (-1451 49) (450 900))
) )
net(3 name(VDD) net(3 name(VDD)
rect(l9 (550 4350) (200 200)) rect(l8 (550 4350) (200 200))
rect(l9 (-200 300) (200 200)) rect(l8 (-200 300) (200 200))
rect(l9 (-200 300) (200 200)) rect(l8 (-200 300) (200 200))
rect(l10 (-250 -1300) (300 1600)) rect(l9 (-250 -1300) (300 1600))
rect(l12 (-250 -800) (200 200)) rect(l11 (-250 -800) (200 200))
rect(l12 (-200 300) (200 200)) rect(l11 (-200 300) (200 200))
rect(l13 (-750 -850) (2000 1000)) rect(l12 (-750 -850) (2000 1000))
rect(l14 (-151 -851) (2 2)) rect(l13 (-151 -851) (2 2))
rect(l23 (-1401 -851) (450 1500)) rect(l1 (-1401 -851) (450 1500))
) )
net(4 name(OUT) net(4 name(OUT)
rect(l9 (1300 4350) (200 200)) rect(l8 (1300 4350) (200 200))
rect(l9 (-200 300) (200 200)) rect(l8 (-200 300) (200 200))
rect(l9 (-200 300) (200 200)) rect(l8 (-200 300) (200 200))
rect(l9 (-200 -5250) (200 200)) rect(l8 (-200 -5250) (200 200))
rect(l9 (-200 300) (200 200)) rect(l8 (-200 300) (200 200))
rect(l10 (-250 3250) (300 1400)) rect(l9 (-250 3250) (300 1400))
rect(l10 (-300 -4600) (300 3200)) rect(l9 (-300 -4600) (300 3200))
rect(l10 (-300 -2900) (450 400)) rect(l9 (-300 -2900) (450 400))
rect(l10 (-450 -1550) (300 850)) rect(l9 (-450 -1550) (300 850))
rect(l11 (-51 499) (2 2)) rect(l10 (-51 499) (2 2))
rect(l23 (-351 2649) (450 1500)) rect(l1 (-351 2649) (450 1500))
rect(l31 (-450 -5500) (450 900)) rect(l5 (-450 -5500) (450 900))
) )
net(5 name(NWELL) net(5 name(NWELL)
rect(l3 (0 2950) (2000 3200)) rect(l3 (0 2950) (2000 3200))

170
testdata/lvs/inv2.lvsdb vendored
View File

@ -9,38 +9,38 @@ layout(
# This section lists the mask layers (drawing or derived) and their connections. # This section lists the mask layers (drawing or derived) and their connections.
# Mask layers # Mask layers
layer(l103 'NWELL (1/0)') layer(l3 'NWELL (1/0)')
layer(l108 'POLY (5/0)') layer(l4 'POLY (5/0)')
layer(l109 'CONTACT (6/0)') layer(l8 'CONTACT (6/0)')
layer(l110 'METAL1 (7/0)') layer(l11 'METAL1 (7/0)')
layer(l111 'METAL1_LABEL (7/1)') layer(l12 'METAL1_LABEL (7/1)')
layer(l112 'VIA1 (8/0)') layer(l13 'VIA1 (8/0)')
layer(l113 'METAL2 (9/0)') layer(l14 'METAL2 (9/0)')
layer(l114 'METAL2_LABEL (9/1)') layer(l15 'METAL2_LABEL (9/1)')
layer(l115) layer(l7)
layer(l123) layer(l1)
layer(l125) layer(l9)
layer(l133) layer(l5)
layer(l135) layer(l10)
# Mask layer connectivity # Mask layer connectivity
connect(l103 l103 l125) connect(l3 l3 l9)
connect(l108 l108 l109) connect(l4 l4 l8)
connect(l109 l108 l109 l110 l123 l125 l133 l135) connect(l8 l4 l8 l11 l1 l9 l5 l10)
connect(l110 l109 l110 l111 l112) connect(l11 l8 l11 l12 l13)
connect(l111 l110 l111) connect(l12 l11 l12)
connect(l112 l110 l112 l113) connect(l13 l11 l13 l14)
connect(l113 l112 l113 l114) connect(l14 l13 l14 l15)
connect(l114 l113 l114) connect(l15 l14 l15)
connect(l115 l115) connect(l7 l7)
connect(l123 l109 l123) connect(l1 l8 l1)
connect(l125 l103 l109 l125) connect(l9 l3 l8 l9)
connect(l133 l109 l133) connect(l5 l8 l5)
connect(l135 l109 l135) connect(l10 l8 l10)
# Global nets and connectivity # Global nets and connectivity
global(l115 SUBSTRATE) global(l7 SUBSTRATE)
global(l135 SUBSTRATE) global(l10 SUBSTRATE)
# Device class section # Device class section
class(PMOS MOS4) class(PMOS MOS4)
@ -50,30 +50,30 @@ layout(
# Device abstracts list the pin shapes of the devices. # Device abstracts list the pin shapes of the devices.
device(D$PMOS PMOS device(D$PMOS PMOS
terminal(S terminal(S
rect(l123 (-575 -750) (450 1500)) rect(l1 (-575 -750) (450 1500))
) )
terminal(G terminal(G
rect(l108 (-125 -750) (250 1500)) rect(l4 (-125 -750) (250 1500))
) )
terminal(D terminal(D
rect(l123 (125 -750) (450 1500)) rect(l1 (125 -750) (450 1500))
) )
terminal(B terminal(B
rect(l103 (-125 -750) (250 1500)) rect(l3 (-125 -750) (250 1500))
) )
) )
device(D$NMOS NMOS device(D$NMOS NMOS
terminal(S terminal(S
rect(l133 (-575 -450) (450 900)) rect(l5 (-575 -450) (450 900))
) )
terminal(G terminal(G
rect(l108 (-125 -450) (250 900)) rect(l4 (-125 -450) (250 900))
) )
terminal(D terminal(D
rect(l133 (125 -450) (450 900)) rect(l5 (125 -450) (450 900))
) )
terminal(B terminal(B
rect(l115 (-125 -450) (250 900)) rect(l7 (-125 -450) (250 900))
) )
) )
@ -83,61 +83,61 @@ layout(
# Nets with their geometries # Nets with their geometries
net(1 name(IN) net(1 name(IN)
rect(l108 (900 50) (250 1050)) rect(l4 (900 50) (250 1050))
rect(l108 (-250 0) (250 3100)) rect(l4 (-250 0) (250 3100))
rect(l108 (-250 0) (250 1650)) rect(l4 (-250 0) (250 1650))
rect(l108 (-800 -3100) (550 400)) rect(l4 (-800 -3100) (550 400))
rect(l109 (-450 -300) (200 200)) rect(l8 (-450 -300) (200 200))
rect(l110 (-300 -300) (400 400)) rect(l11 (-300 -300) (400 400))
rect(l111 (-201 -201) (2 2)) rect(l12 (-201 -201) (2 2))
) )
net(2 name(VDD) net(2 name(VDD)
rect(l103 (0 2950) (3000 3200)) rect(l3 (0 2950) (3000 3200))
rect(l109 (-2450 -1800) (200 200)) rect(l8 (-2450 -1800) (200 200))
rect(l109 (-200 300) (200 200)) rect(l8 (-200 300) (200 200))
rect(l109 (-200 300) (200 200)) rect(l8 (-200 300) (200 200))
rect(l109 (1400 -800) (200 200)) rect(l8 (1400 -800) (200 200))
rect(l109 (-200 300) (200 200)) rect(l8 (-200 300) (200 200))
rect(l110 (-1850 -1200) (300 1600)) rect(l11 (-1850 -1200) (300 1600))
rect(l110 (1300 -1200) (300 1200)) rect(l11 (1300 -1200) (300 1200))
rect(l112 (-1850 -800) (200 200)) rect(l13 (-1850 -800) (200 200))
rect(l112 (-200 300) (200 200)) rect(l13 (-200 300) (200 200))
rect(l112 (1400 -700) (200 200)) rect(l13 (1400 -700) (200 200))
rect(l112 (-200 300) (200 200)) rect(l13 (-200 300) (200 200))
rect(l113 (-2350 -850) (3000 1000)) rect(l14 (-2350 -850) (3000 1000))
rect(l114 (-151 -851) (2 2)) rect(l15 (-151 -851) (2 2))
rect(l123 (-2401 -851) (450 1500)) rect(l1 (-2401 -851) (450 1500))
rect(l125 (1050 -1200) (600 1200)) rect(l9 (1050 -1200) (600 1200))
) )
net(3 name(OUT) net(3 name(OUT)
rect(l109 (1300 4350) (200 200)) rect(l8 (1300 4350) (200 200))
rect(l109 (-200 300) (200 200)) rect(l8 (-200 300) (200 200))
rect(l109 (-200 300) (200 200)) rect(l8 (-200 300) (200 200))
rect(l109 (-200 -5250) (200 200)) rect(l8 (-200 -5250) (200 200))
rect(l109 (-200 300) (200 200)) rect(l8 (-200 300) (200 200))
rect(l110 (-250 3250) (300 1400)) rect(l11 (-250 3250) (300 1400))
rect(l110 (-300 -4600) (300 3200)) rect(l11 (-300 -4600) (300 3200))
rect(l110 (-300 -2900) (450 400)) rect(l11 (-300 -2900) (450 400))
rect(l110 (-450 -1550) (300 850)) rect(l11 (-450 -1550) (300 850))
rect(l111 (-51 499) (2 2)) rect(l12 (-51 499) (2 2))
rect(l123 (-351 2649) (450 1500)) rect(l1 (-351 2649) (450 1500))
rect(l133 (-450 -5500) (450 900)) rect(l5 (-450 -5500) (450 900))
) )
net(4 name(VSS) net(4 name(VSS)
rect(l109 (550 300) (200 200)) rect(l8 (550 300) (200 200))
rect(l109 (-200 300) (200 200)) rect(l8 (-200 300) (200 200))
rect(l109 (1400 -550) (200 200)) rect(l8 (1400 -550) (200 200))
rect(l109 (-200 300) (200 200)) rect(l8 (-200 300) (200 200))
rect(l110 (-1850 -1100) (300 1050)) rect(l11 (-1850 -1100) (300 1050))
rect(l110 (1300 -1050) (300 1200)) rect(l11 (1300 -1050) (300 1200))
rect(l112 (-1850 -1100) (200 200)) rect(l13 (-1850 -1100) (200 200))
rect(l112 (-200 300) (200 200)) rect(l13 (-200 300) (200 200))
rect(l112 (1400 -700) (200 200)) rect(l13 (1400 -700) (200 200))
rect(l112 (-200 300) (200 200)) rect(l13 (-200 300) (200 200))
rect(l113 (-2350 -850) (3000 1000)) rect(l14 (-2350 -850) (3000 1000))
rect(l114 (-151 -851) (2 2)) rect(l15 (-151 -851) (2 2))
rect(l133 (-2401 49) (450 900)) rect(l5 (-2401 49) (450 900))
rect(l135 (1050 -900) (600 1200)) rect(l10 (1050 -900) (600 1200))
) )
# Devices and their connections # Devices and their connections

8
testdata/ruby/dbNetlistCompare.rb vendored
View File

@ -839,10 +839,10 @@ match_devices $3 $3
match_devices $4 $4 match_devices $4 $4
end_circuit NAND NAND MATCH end_circuit NAND NAND MATCH
begin_circuit TOP TOP begin_circuit TOP TOP
match_nets OUT OUT
match_nets INT INT
match_nets IN2 IN2 match_nets IN2 IN2
match_nets INT INT
match_nets IN1 IN1 match_nets IN1 IN1
match_nets OUT OUT
match_nets VDD VDD match_nets VDD VDD
match_nets VSS VSS match_nets VSS VSS
match_pins $0 $0 match_pins $0 $0
@ -883,10 +883,10 @@ match_devices $3 $3
match_devices $4 $4 match_devices $4 $4
end_circuit NAND NAND MATCH end_circuit NAND NAND MATCH
begin_circuit TOP TOP begin_circuit TOP TOP
match_nets OUT OUT
match_nets INT INT
match_nets IN2 IN2 match_nets IN2 IN2
match_nets INT INT
match_nets IN1 IN1 match_nets IN1 IN1
match_nets OUT OUT
match_nets VDD VDD match_nets VDD VDD
match_nets VSS VSS match_nets VSS VSS
match_pins $0 $0 match_pins $0 $0