d746c592b2
If the index of an array access is known to be out-of-bounds during elaboration it is replaced with 'x. In the tgt-vvp backend that is handling compressed array assignments there is an assert() that triggers if the index is an undefined immediate. There is already an existing code path that is capable of handling out-of-bounds access. Remove the assert and set the index to ULONG_MAX to trigger taking the out-of-bound access path. On this out-of-bounds path the write to the array is skipped. But this leaves the result on the vector stack. Insert the `%pop/vec4` instruction to make sure it is removed. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> |
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| .. | ||
| COPYING.lesser | ||
| Makefile.in | ||
| README.txt | ||
| cppcheck.sup | ||
| draw_class.c | ||
| draw_delay.c | ||
| draw_enum.c | ||
| draw_mux.c | ||
| draw_net_input.c | ||
| draw_substitute.c | ||
| draw_switch.c | ||
| draw_ufunc.c | ||
| draw_vpi.c | ||
| eval_condit.c | ||
| eval_expr.c | ||
| eval_object.c | ||
| eval_real.c | ||
| eval_string.c | ||
| eval_vec4.c | ||
| modpath.c | ||
| stmt_assign.c | ||
| vvp-s.conf.in | ||
| vvp.c | ||
| vvp.conf.in | ||
| vvp_config.h.in | ||
| vvp_priv.h | ||
| vvp_process.c | ||
| vvp_scope.c | ||
README.txt
THE VVP TARGET SYMBOL NAME CONVENTIONS There are some naming conventions that the vvp target uses for generating symbol names. * wires and regs Nets and variables are named V_<full-name> where <full-name> is the full hierarchical name of the signal. * Logic devices Logic devices (and, or, buf, bufz, etc.) are named L_<full_name>. In this case the symbol is attached to a functor that is the output of the logic device. GENERAL FUNCTOR WEB STRUCTURE The net of gates, signals and resolvers is formed from the input design. The basic structure is wrapped around the nexus, which is represented by the ivl_nexus_t. Each nexus represents a resolved value. The input of the nexus is fed by a single driver. If the nexus in the design has multiple drivers, the drivers are first fed into a resolver (or a tree of resolvers) to form a single output that is the nexus. The nexus, then, feeds its output to the inputs of other gates, or to the .net objects in the design.