luke
/
iverilog
mirror of https://github.com/steveicarus/iverilog.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

tgt-vvp: Allow dynamic array new for vectors with multiple packed dimensions 

In the vvp all vector signals are in canonical form. This means a single
dimension and the lsb starts at 0.

This means that there is no need to restrict new operations for dynamic
arrays of vectors to vectors with 0 or 1 packed dimensions. Multiple packed
dimensions will work just fine. All that is needed is the total packed
width for the signal.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
This commit is contained in:
Lars-Peter Clausen 2022-03-04 10:41:39 +01:00
parent ede341410f
commit 32d1f385f8
1 changed files with 1 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
tgt-vvp/eval_object.c
View File

@ -28,18 +28,7 @@ void darray_new(ivl_type_t element_type, unsigned size_reg)
ivl_variable_type_t type = ivl_type_base(element_type);
if ((type == IVL_VT_BOOL) || (type == IVL_VT_LOGIC)) {
// bool objects are vectorable, but for now only support
// a single dimensions.
assert(ivl_type_packed_dimensions(element_type) <= 1);
if (ivl_type_packed_dimensions(element_type) == 1) {
int msb, lsb;
msb = ivl_type_packed_msb(element_type, 0);
lsb = ivl_type_packed_lsb(element_type, 0);
wid = msb>=lsb ? msb - lsb : lsb - msb;
wid += 1;
} else {
wid = 1;
}
wid = width_of_packed_type(element_type);
signed_char = ivl_type_signed(element_type) ? "s" : "";
} else {
// REAL or STRING objects are not packable.