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https://github.com/steveicarus/iverilog.git
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Stephen Williams
cea237b407
By adding ivtest to the iverilog source tree, it is easier to keep the regression test synchronized with the source that is being tested. This should be especially helpful for PRs that add a new feature, and have a matching ivtest PR with the regression test for that feature.
84 lines
5.2 KiB
Verilog
84 lines
5.2 KiB
Verilog
// This tests unalligned write/read access to packed structures
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//
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// This file ONLY is placed into the Public Domain, for any use,
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// without warranty, 2012 by Iztok Jeras.
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module test;
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typedef struct packed {
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logic [7:0] high;
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logic [7:0] low;
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} word_t;
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// Declare word* as a VARIABLE
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word_t word_se0, word_se1, word_se2, word_se3;
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word_t word_sw0, word_sw1, word_sw2, word_sw3;
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word_t word_sp0, word_sp1, word_sp2, word_sp3;
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word_t word_ep0, word_ep1, word_ep2, word_ep3;
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// error counter
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bit err = 0;
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// access to structure elements
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assign word_se1.high = {8+0{1'b1}};
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assign word_se1.low = {8+0{1'b0}};
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assign word_se2.high = {8+1{1'b1}};
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assign word_se2.low = {8+1{1'b0}};
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assign word_se3.high = {8-1{1'b1}};
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assign word_se3.low = {8-1{1'b0}};
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// access to whole structure
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assign word_sw1 = {16+0{1'b1}};
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assign word_sw2 = {16+1{1'b1}};
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assign word_sw3 = {16-1{1'b1}};
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// access to parts of structure elements
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assign word_ep1.high [3:0] = {4+0{1'b1}};
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assign word_ep1.low [3:0] = {4+0{1'b0}};
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assign word_ep2.high [3:0] = {4+1{1'b1}};
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assign word_ep2.low [3:0] = {4+1{1'b0}};
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assign word_ep3.high [3:0] = {4-1{1'b1}};
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assign word_ep3.low [3:0] = {4-1{1'b0}};
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// access to parts of the whole structure
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assign word_sp1 [11:4] = {8+0{1'b1}};
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assign word_sp2 [11:4] = {8+1{1'b1}};
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assign word_sp3 [11:4] = {8-1{1'b1}};
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initial begin
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#1;
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// access to structure elements
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if (word_se0 !== 16'bxxxxxxxx_xxxxxxxx) begin $display("FAILED -- word_se0 = 'b%b", word_se0 ); err=1; end
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if (word_se1 !== 16'b11111111_00000000) begin $display("FAILED -- word_se1 = 'b%b", word_se1 ); err=1; end
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if (word_se1.high !== 8'b11111111 ) begin $display("FAILED -- word_se1.high = 'b%b", word_se1.high); err=1; end
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if (word_se1.low !== 8'b00000000 ) begin $display("FAILED -- word_se1.low = 'b%b", word_se1.low ); err=1; end
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if (word_se2 !== 16'b11111111_00000000) begin $display("FAILED -- word_se2 = 'b%b", word_se2 ); err=1; end
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if (word_se2.high !== 8'b11111111 ) begin $display("FAILED -- word_se2.high = 'b%b", word_se2.high); err=1; end
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if (word_se2.low !== 8'b00000000 ) begin $display("FAILED -- word_se2.low = 'b%b", word_se2.low ); err=1; end
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if (word_se3 !== 16'b01111111_00000000) begin $display("FAILED -- word_se3 = 'b%b", word_se3 ); err=1; end
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if (word_se3.high !== 8'b01111111 ) begin $display("FAILED -- word_se3.high = 'b%b", word_se3.high); err=1; end
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if (word_se3.low !== 8'b00000000 ) begin $display("FAILED -- word_se3.low = 'b%b", word_se3.low ); err=1; end
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// access to whole structure
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if (word_sw0 !== 16'bxxxxxxxx_xxxxxxxx) begin $display("FAILED -- word_sw0 = 'b%b", word_sw0 ); err=1; end
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if (word_sw1 !== 16'b11111111_11111111) begin $display("FAILED -- word_sw1 = 'b%b", word_sw1 ); err=1; end
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if (word_sw2 !== 16'b11111111_11111111) begin $display("FAILED -- word_sw2 = 'b%b", word_sw2 ); err=1; end
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if (word_sw3 !== 16'b01111111_11111111) begin $display("FAILED -- word_sw3 = 'b%b", word_sw3 ); err=1; end
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// access to parts of structure elements
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if (word_ep0 !== 16'bxxxxxxxx_xxxxxxxx) begin $display("FAILED -- word_ep0 = 'b%b", word_ep0 ); err=1; end
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if (word_ep1 !== 16'bxxxx1111_xxxx0000) begin $display("FAILED -- word_ep1 = 'b%b", word_ep1 ); err=1; end
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if (word_ep1.high !== 8'bxxxx1111 ) begin $display("FAILED -- word_ep1.high = 'b%b", word_ep1.high); err=1; end
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if (word_ep1.low !== 8'bxxxx0000 ) begin $display("FAILED -- word_ep1.low = 'b%b", word_ep1.low ); err=1; end
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if (word_ep2 !== 16'bxxxx1111_xxxx0000) begin $display("FAILED -- word_ep2 = 'b%b", word_ep2 ); err=1; end
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if (word_ep2.high !== 8'bxxxx1111 ) begin $display("FAILED -- word_ep2.high = 'b%b", word_ep2.high); err=1; end
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if (word_ep2.low !== 8'bxxxx0000 ) begin $display("FAILED -- word_ep2.low = 'b%b", word_ep2.low ); err=1; end
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if (word_ep3 !== 16'bxxxx0111_xxxx0000) begin $display("FAILED -- word_ep3 = 'b%b", word_ep3 ); err=1; end
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if (word_ep3.high !== 8'bxxxx0111 ) begin $display("FAILED -- word_ep3.high = 'b%b", word_ep3.high); err=1; end
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if (word_ep3.low !== 8'bxxxx0000 ) begin $display("FAILED -- word_ep3.low = 'b%b", word_ep3.low ); err=1; end
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// access to parts of the whole structure
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if (word_sp0 !== 16'bxxxxxxxx_xxxxxxxx) begin $display("FAILED -- word_sp0 = 'b%b", word_sp0 ); err=1; end
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if (word_sp1 !== 16'bxxxx1111_1111xxxx) begin $display("FAILED -- word_sp1 = 'b%b", word_sp1 ); err=1; end
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if (word_sp2 !== 16'bxxxx1111_1111xxxx) begin $display("FAILED -- word_sp2 = 'b%b", word_sp2 ); err=1; end
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if (word_sp3 !== 16'bxxxx0111_1111xxxx) begin $display("FAILED -- word_sp3 = 'b%b", word_sp3 ); err=1; end
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if (!err) $display("PASSED");
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end
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endmodule // test
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