iverilog/tgt-vvp
steve 2cb76cabef events can take up to 4 inputs. 2001-03-29 03:47:13 +00:00
..
.cvsignore Add the tgt-vvp code generator target. 2001-03-19 01:20:46 +00:00
Makefile.in Recursive make check target. 2001-03-25 05:59:46 +00:00
README.txt Add a README for notes about the vvp target. 2001-03-25 18:10:39 +00:00
configure.in Add the tgt-vvp code generator target. 2001-03-19 01:20:46 +00:00
eval_expr.c Add unary ~ operator to tgt-vvp. 2001-03-29 02:52:39 +00:00
vvp.c Support error code from target_t::end_design method. 2001-03-27 03:31:06 +00:00
vvp_priv.h Generate code for simple @ statements. 2001-03-27 06:27:40 +00:00
vvp_process.c Add the ivl_event_t to ivl_target, and use that to generate 2001-03-28 06:07:39 +00:00
vvp_scope.c events can take up to 4 inputs. 2001-03-29 03:47:13 +00:00

README.txt

THE VVP TARGET

SYMBOL NAME CONVENTIONS

There are some naming conventions that the vp target uses for
generating symbol names.

* wires and regs

Nets and variables are named V_<full-name> where <full-name> is the
full hierarchical name of the signal.

* Logic devices

Logic devices (and, or, buf, bufz, etc.) are named L_<full_name>. In
this case the symbol is attached to a functor that is the output of
the logic device.