Add a README for notes about the vvp target.
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THE VVP TARGET
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SYMBOL NAME CONVENTIONS
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There are some naming conventions that the vp target uses for
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generating symbol names.
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* wires and regs
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Nets and variables are named V_<full-name> where <full-name> is the
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full hierarchical name of the signal.
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* Logic devices
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Logic devices (and, or, buf, bufz, etc.) are named L_<full_name>. In
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this case the symbol is attached to a functor that is the output of
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the logic device.
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