Implement the IEEE 1364 structural VPI objects that Icarus previously left
unimplemented, so a single-source consumer (e.g. a dataflow/waveform viewer)
gets real data instead of empty fallbacks. Each object is sourced faithfully
from the compiler and threaded ivl -> tgt-vvp -> .vvp directive -> assembler
-> runtime __vpi* -> scope iterator -> vpi_user.h constants.
* vpiProcess (always/initial/final): .process directive from ivl_design_process;
object reports vpiType/vpiLineNo/vpiFile/vpiScope.
* vpiPrimitive / vpiPrimTerm (gate/switch/UDP): .primitive directive from
ivl_scope_logs; reports vpiPrimType, vpiSize (#inputs), name, location, and
iterates terminals (vpiDirection, vpiTermIndex).
* vpiDriver: the tri resolver already retains each driver's value+strength;
tgt-vvp tags each input with its driver scope (.resolv_drv), and
vpi_iterate(vpiDriver, net) exposes per-driver value (vpiStrengthVal) and
scope. signal->node->fun is the resolver, so no extra linkage is needed.
* vpiContAssign (+vpiLhs/vpiRhs): continuous assignments are preserved through
the frontend (NetScope records each lval/rval/location/drive in
PGAssign::elaborate; dll_target::end_design builds ivl_cont_assign_s, exposed
via the new ivl_scope_cassigns/ivl_cassign_* API); tgt-vvp emits .contassign
and the runtime materialises __vpiContAssign. vpiLhs/size/location are always
faithful; vpiRhs resolves to the r-value net for simple assigns and is null
for an expression r-value (anonymous synthesised temp).
* EVCD ($dumpports) inout conflict states: sys_evcd.c walks vpiDriver on an
inout's net, separates module-side from external drives by scope, and maps
the pair to the full IEEE 1364-2005 18.4.3 state characters (0/1/?/F, the
A/a/B/b/C/c conflicts, and d/u/l/h by drive strength) instead of collapsing
a genuine bus conflict to '?'. New ivtest evcd_inout covers it.
Full Verilog regression (regress-vlg.list) stays clean: the only failures are
pre-existing (gold-less Expected-Fail tests, a VHDL test, a test needing
-gno-io-range-error, and a pre-existing .port_info bug).
Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
`std::vector<netrange_t>` is used for signal array dimensions. As such it is
used in quite a few places.
Add a typedef that can be used as a shorthand to refer to it. This helps to
keep lines where this is used from growing to overly long.
The new type is called `netranges_t`.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Clean up warnings that show up on newer compilers. Many of these warnings
are related to obsolete c library features or language features. This does
not clear up warnings in code generated by bison or flex.
SystemVerilog supports type parameters. These are similar to value
parameters, but they allow to pass a type to a module or similar when
instantiating it.
E.g.
```
module A #(parameter type T = int);
endmodule
module B;
A #(.T(real)) i_a;
endmodule
```
Add support for handling type parameters.
For the vlog95 and vhdl backends type parameters, similar to typedefs, get
replaced with their actual value. For modules with non-local type
parameters for each module instance a unique module or architecture is
generated with the actual type.
Querying type parameters through VPI is not yet supported.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
We differentiate between local and non-overridable parameters
in the frontend to be able to generate better error messages.
For the backend they should both be considered local parameters.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Use the common data_type_or_implicit rules to support type
definitions for parameters. This eliminates a bunch of special
rules in parse.y, and opens the door for parameters having
more complex types.
In the rare cases where DARRAY signals are in the network, handle
them by creating the proper ivl_nexus_t node. This also implements
the receive of vvp_object_t objects bu vvp_fun_anyedge_sa. This
together makes it possible for IVL_VT_DQUEUE objects to be in
wait lists.
This fixes#412
The compilation unit scope is now treated as a specialised form of
package (with an automatically generated name). All items declared
outside a design element are added to the current compilation unit
package. Apart from when searching for a symbol, once we get into
elaboration we can treat these just like any other package.
The .scope needs to be aware of return types so that the %call/vec4
function knows how to intialize the return value. We also need to
extend the %ret/vec4 to support writing parts of the return value.
When for example assigning to foo[<x>] within a contitional, and
doing synthesis, we need to create a NetSubstitute device to manage
the l-value bit selects.
This generates an EQZ LPM device that carries the case-z-ness to
the code generator.
Also add to the vvp code generator support for the EQZ device so
that the synthesis results can be simulated.
Account for the wildcard devices in the sizer.
This gets nested l-values to (but just short of) the ivl_target API.
Now the elaborator can process nested l-values, but I haven't figured
out how to present that at the ivl_target.h API.
Emit the elaborated class methods. Also generate root scopes to
represent the classes in order to hold the methods. These scopes
can also in the future be used to implement static properties.
William P. Moore
Cary R
Martin Whitaker
Lars-Peter Clausen
mole99
Stephen Williams
Stephen Williams
Johann Klammer
Christian Taedcke
Martin Whitaker