Commit Graph

9 Commits

Author SHA1 Message Date
Stephen Williams 4b3ef8a314 Merge branch 'master' of github.com:steveicarus/iverilog 2012-12-23 12:18:05 -08:00
Arun Persaud f5aafc32f9 updated FSF-address 2012-08-29 10:12:10 -07:00
Stephen Williams f926cbcc59 Merge branch 'master' of github.com:steveicarus/iverilog 2012-04-26 09:03:20 -07:00
Cary R 62b7c52329 Fix a few cppcheck issues and update some suppressions 2012-01-05 18:55:00 -08:00
Cary R f22b42c2cd Update tgt-pcb Makefile to handle/clean up config header
This change matches what is in other header files.
2012-01-03 16:35:03 -08:00
Stephen Williams 5451a4830f Basic support in tgt-pcb for reading footprint files.
When a black-box item requests a specific footprint, we need to
read a file (<footprint>.fp) that contains the actual details
about that footprint. Support parse of that file and use the
loaded Element to generate the footprint for the item.
2011-12-26 23:05:52 -08:00
Cary R 4b96b63166 Fix more tgt-pcb compile problems.
On some systems having both %.o: %.c and %.o: %.cc rules confused the
make system. This is directory only has C++ code so remove the %o: %.c
rule. Also the C++ compiler should be used to link C++ object code.
2011-12-24 10:03:15 -08:00
Stephen Williams a57ce2a709 Add ability to write out Elements in a PCB file.
The main .pcb file contains elements, and basic PCB status.
Write out a .pcb file with stub Elements for each of the devices
in the design.

Rearrange the way the files are reported to the code generator
so that we can sensibly express where the output files are.
2011-12-23 17:06:55 -05:00
Stephen Williams 9075326bb7 Introduce PCB code generator. 2011-12-20 14:16:54 -06:00