This is the initial commit in an effort to build a 1364-1995
back end for Icarus Verilog. It is expected that this back end
will allow the user to write 1364-2005 RTL and then using this
back end (converter) generate functionally equivalent 1364-1995
compatible code. This can be used to support older tools in a
work flow. The primary focus will be simulation equivalence,
though I expect to verify logical equivalence as well.