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iverilog
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4 Commits

Author SHA1 Message Date
Stephen Williams ab8f623cea Add file/line information to entities and ports 
Include the compiler infrastructure to vhdlpp for collecting the
file and line information and attaching it to entities and ports.
Make the parser store the file name during parse.

Create a libmisc library where I can put source files that are
used by multiple programs within the source tree.
 2011-01-18 17:03:51 -08:00
Stephen Williams 5a6d07ff9f Emit Verilog stubs for entities 
The verilog includes the module declaration with correct ports
in the correct order. Get the port directions correct.
 2011-01-18 17:03:51 -08:00
Stephen Williams 02820c9e34 Parse create entities with ports 
Create entity objects from entity declarations in the source,
and populate them with ports.
 2011-01-18 17:03:51 -08:00
Stephen Williams 8cf1fd1820 Introduce shell of vhdlpp program. 
Create the makefiles and configuration scripts to hold together
the vhdlpp front-end program. Create a shell main.
 2011-01-18 17:03:51 -08:00