60deb775ca
Add support for VHDL's loop statements
2011-07-12 19:20:04 -07:00
ad31eaaea8
Add parser support for VHDL's procedure call
...
Parse procedure calls and put them into
abstract syntax tree. Elaboration and emission
still has to be done.
2011-07-08 18:10:30 -07:00
830b7cf122
Add basic instantiation list handling in VHDL
...
A class for representing instantiation list has
been added.
2011-04-02 09:27:58 -07:00
26e6865bef
Add entity aspects to VHDL parsing
...
Entity aspects are now recognized and parsed
into corresponding objects. A new class (entity_aspect)
has been added.
2011-04-01 17:03:45 -07:00
abb03632dd
Basic elaboration of vhdl component instantiations.
...
This gets us as far as emiting a component instantiation. Very little
error checking/elaboration is done, so there is room for improvement,
but this is a working stub.
2011-03-31 19:07:43 -07:00
Pawel Szostek
Pawel Szostek
Stephen Williams