103 Commits

Author	SHA1	Message	Date
steve	ebad845fc3	Add procedural while loops, ... Parse procedural for loops, Add procedural wait statements, Add constant nodes, Add XNOR logic gate, Make vvm output look a bit prettier.	1998-11-09 18:55:33 +00:00
steve	b118634189	Handle procedural conditional, and some ... of the conditional expressions. Elaborate signals and identifiers differently, allowing the netlist to hold signal information.	1998-11-07 17:05:05 +00:00
steve	3fb7a053be	Introduce verilog to CVS.	1998-11-03 23:28:49 +00:00