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717 Commits

Author SHA1 Message Date
steve bb38653654 Parse system function calls. 1999-09-25 02:57:29 +00:00
steve 12b9071f49 Parse and elaborate named for/join blocks. 1999-09-22 04:30:04 +00:00
steve da4a7ea80a assignment with blocking event delay. 1999-09-22 02:00:48 +00:00
steve 424e6a750c Handle unconnected module ports. 1999-09-17 02:06:25 +00:00
steve 287d21f300 Handle integers at task parameters. 1999-09-10 05:02:09 +00:00
steve 6fb7120158 Parse non-blocking assignment delays. 1999-09-02 01:59:27 +00:00
steve 3017636c05 continuous assignment lists. 1999-08-27 15:08:37 +00:00
steve 23acca48ff elaborate some aspects of functions. 1999-08-25 22:22:41 +00:00
steve 9eae940ebd Parameter overrides support from Peter Monta 
AND and XOR support wide expressions.
 1999-08-23 16:48:39 +00:00
steve 0fdc7657ef Fix handling of port name when . notation is used. 1999-08-03 04:48:51 +00:00
steve 5f10342f52 Parse into pform arbitrarily complex module 
port declarations.
 1999-08-03 04:14:49 +00:00
steve 4b057c2d93 Get gat names, instead of the first character. 1999-08-01 23:25:51 +00:00
steve 71d35f32b2 Parse and elaborate rise/fall/decay times 
for gates, and handle the rules for partial
 lists of times.
 1999-08-01 16:34:50 +00:00
steve e0a988bf7e Add functions up to elaboration (Ed Carter) 1999-07-31 19:14:47 +00:00
steve 55654db9df quietly ignore specify code. 1999-07-28 03:47:24 +00:00
steve 93a77a2efd Elaborate task input ports. 1999-07-24 02:11:19 +00:00
steve 6852a62e5a procedural blocking assignment delays. 1999-07-12 00:59:36 +00:00
steve c8d13d7a1c Support concatenate in l-values. 1999-07-10 02:19:26 +00:00
steve 46df679fc5 remove string from lexical phase. 1999-07-10 01:03:18 +00:00
steve 3ff6912bdd Elaborate user defined tasks. 1999-07-03 02:12:51 +00:00
steve 11b2b1740a Handle expression widths for EEE and NEE operators, 
add named blocks and scope handling,
 add registers declared in named blocks.
 1999-06-24 04:24:18 +00:00
steve 853ad247a1 Elaborate and supprort to vvm the forever 
and repeat statements.
 1999-06-19 21:06:16 +00:00
steve c01399fcda Parse some more specify syntax. 1999-06-19 03:21:21 +00:00
steve 37b60a4c52 Clean up interface of the PWire class, 
Properly match wire ranges.
 1999-06-17 05:34:42 +00:00
steve add2803267 More syntax parse with sorry stubs. 1999-06-16 03:13:29 +00:00
steve fabb146342 Support case expression lists. 1999-06-15 05:38:39 +00:00
steve 430d7b22e4 Add lexical support for real numbers. 1999-06-15 02:50:02 +00:00
steve 0d210c90e5 More unary operators. 1999-06-13 17:30:23 +00:00
steve a22e43cb7a Handle part selects as l-values to continuous assign. 1999-06-12 23:16:37 +00:00
steve 29da349106 parse more verilog. 1999-06-12 20:35:27 +00:00
steve 63627de7fa More parseable syntax. 1999-06-12 03:42:57 +00:00
steve fdaae4aa2a Forgot to return th for statement object. 1999-06-10 05:33:12 +00:00
steve 7c2cf8b2fa Add support for the Ternary operator, 
Add support for repeat concatenation,
 Correct some seg faults cause by elaboration
 errors,
 Parse the casex anc casez statements.
 1999-06-10 04:03:52 +00:00
steve 1464851e0e Add support for procedural concatenation expression. 1999-06-09 03:00:05 +00:00
steve 7605a7b1f0 Add parse and elaboration of non-blocking assignments, 
Replace list<PCase::Item*> with an svector version,
 Add integer support.
 1999-06-06 20:45:38 +00:00
steve f3a91a10b3 Line information with nets. 1999-06-02 15:38:46 +00:00
steve 2a85ee5059 Net declaration assignments. 1999-06-02 02:56:29 +00:00
steve 0ca5a282e5 parse functions and tasks and delay value lists. 1999-05-30 03:12:56 +00:00
steve 35893919e0 module parameter bind by name. 1999-05-29 02:36:17 +00:00
steve c1dbb56b70 Line number information. 1999-05-27 03:31:29 +00:00
steve 0352864470 Much expression parsing work, 
mark continuous assigns with source line info,
 replace some assertion failures with Sorry messages.
 1999-05-20 04:31:45 +00:00
steve 10ffaeda90 Redo constant expression detection to happen 
after parsing.

 Parse more operators and expressions.
 1999-05-16 05:08:42 +00:00
steve 5de9b7c9f1 Parse and elaborate the concatenate operator 
in structural contexts, Replace vector<PExpr*>
 and list<PExpr*> with svector<PExpr*>, evaluate
 constant expressions with parameters, handle
 memories as lvalues.

 Parse task declarations, integer types.
 1999-05-10 00:16:57 +00:00
steve 6625ea71c2 Parse more things. 1999-05-08 20:19:20 +00:00
steve 8e73ff2376 Parse more complex continuous assign lvalues. 1999-05-07 04:26:49 +00:00
steve a568e526c6 Get rid of list<lgate> types. 1999-05-06 04:37:17 +00:00
steve b2b9097488 Parse more constant expressions. 1999-05-06 04:09:28 +00:00
steve 10f46dae66 More intelligent selection of module to elaborate. 1999-05-05 03:27:14 +00:00
steve 41f9a84a4b Handle much more complex event expressions. 1999-05-01 02:57:52 +00:00
steve ce49708442 Parse OR of event expressions. 1999-04-29 02:16:26 +00:00
steve 5895d3c98d Add memories to the parse and elaboration phases. 1999-04-19 01:59:36 +00:00
steve bd40e5dfe1 Support sized decimal numbers, 
Fix operator precedence order.
 1999-03-16 04:44:45 +00:00
steve b7f833dd71 Support more operators, especially logical. 1999-03-15 02:43:32 +00:00
steve e2a37a8ccd Add support for module parameters. 1999-02-21 17:01:57 +00:00
steve e5f5f41515 Elaborate gate ranges. 1999-02-15 02:06:15 +00:00
steve 8bdd381cdf Parse and elaborate the Verilog CASE statement. 1999-02-03 04:20:11 +00:00
steve fb439c78b9 Add the LineInfo class to carry the source file 
location of things. PGate, Statement and PProcess.

 elaborate handles module parameter mismatches,
 missing or incorrect lvalues for procedural
 assignment, and errors are propogated to the
 top of the elaboration call tree.

 Attach line numbers to processes, gates and
 assignment statements.
 1999-01-25 05:45:56 +00:00
steve 2c1df3e6f7 Parse more UDP input edge descriptions. 1998-12-18 05:16:25 +00:00
steve 10b345bd16 Fully elaborate Sequential UDP behavior. 1998-12-14 02:01:34 +00:00
steve e097c999d5 Elaborate UDP devices, 
Support UDP type attributes, and
 pass those attributes to nodes that
 are instantiated by elaboration,
 Put modules into a map instead of
 a simple list.
 1998-12-01 00:42:13 +00:00
steve 91aad30e1f Parse UDP primitives all the way to pform. 1998-11-25 02:35:53 +00:00
steve af8d6fbf01 NetAssign handles lvalues as pin links 
instead of a signal pointer,
 Wire attributes added,
 Ability to parse UDP descriptions added,
 XNF generates EXT records for signals with
 the PAD attribute.
 1998-11-23 00:20:22 +00:00
steve 6b2fa19429 Handle while loops. 1998-11-11 03:13:04 +00:00
steve d27f260bc1 Check net ranges in declarations. 1998-11-11 00:01:51 +00:00
steve ebad845fc3 Add procedural while loops, 
Parse procedural for loops,
 Add procedural wait statements,
 Add constant nodes,
 Add XNOR logic gate,
 Make vvm output look a bit prettier.
 1998-11-09 18:55:33 +00:00
steve b118634189 Handle procedural conditional, and some 
of the conditional expressions.

 Elaborate signals and identifiers differently,
 allowing the netlist to hold signal information.
 1998-11-07 17:05:05 +00:00
steve 3fb7a053be Introduce verilog to CVS. 1998-11-03 23:28:49 +00:00