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iverilog
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3 Commits

Author SHA1 Message Date
steve 5895d3c98d Add memories to the parse and elaboration phases. 1999-04-19 01:59:36 +00:00
steve af8d6fbf01 NetAssign handles lvalues as pin links 
instead of a signal pointer,
 Wire attributes added,
 Ability to parse UDP descriptions added,
 XNF generates EXT records for signals with
 the PAD attribute.
 1998-11-23 00:20:22 +00:00
steve 3fb7a053be Introduce verilog to CVS. 1998-11-03 23:28:49 +00:00