5f0bbe4cdb
One more makefile fix.
2019-10-22 20:30:09 +01:00
e6b0396e6f
Makefile fixes.
2019-10-22 16:51:14 +01:00
a59b183bd1
Allow VPI modules to be loaded by multiple clients under Windows.
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The old scheme of linking the VPI modules with the vvp exports meant they
did not work when loaded by the compiler. Instead, let each client create
a jump table for the VPI routines and pass that to each VPI module as it
is loaded.
2019-10-22 16:00:13 +01:00
e63135b412
Add -BM driver option to specify different base path for VPI modules.
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This is needed for 'make check'.
2019-10-21 19:43:00 +01:00
1c7f7aedbe
Update man page.
2019-10-21 15:33:39 +01:00
8d3e895593
Remove obsolete SFT files.
2019-10-21 13:53:53 +01:00
d1ae818a9f
Remove static system function return descriptors.
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The information is provided by the VPI modules.
2019-10-21 13:49:19 +01:00
a92a3074c0
Fix some missing/incorrect function return types in the system VPI modules.
2019-10-21 13:45:09 +01:00
9f93989944
Extract system function return types from VPI modules, not SFT files.
2019-10-21 13:40:40 +01:00
df38460d26
Add the missing ivl_stmt_case_quality to ivl.def
2019-10-20 16:35:31 -07:00
077d8d6c4d
Update fstapi.c to latest from GTKWave
2019-10-20 16:35:24 -07:00
1069a0ef02
Don't evaluate built-in system functions if they are overridden.
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We don't support evaluating user-defined system functions at compile
time. If possible, defer evaluation until run time. If used in a
constant expression, output a "sorry" message.
2019-10-19 16:12:17 +01:00
bf655003e8
Merge branch 'master' of github.com:steveicarus/iverilog
2019-10-14 14:11:58 -07:00
0abf91ca4e
Make vvp exit with FAILURE if $fatal is used to exit the simulation.
2019-10-14 14:11:50 -07:00
cb69a321ab
Enable user-defined system functions to override built-in functions.
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Fixes bug reported on iverilog-devel on 2019-10-13.
2019-10-14 21:41:58 +01:00
b82c185051
iverilog: Allow the user to specify the location of VPI modules.
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Make it explicit in the manual that a path can be supplied with the -m
option, and when it is, search for a SFT file there, not in the base
directory.
2019-10-14 21:34:40 +01:00
9f7dc732ab
Add error recovery for invalid cast expressions.
2019-10-11 19:04:23 +01:00
d56e90c3f4
Fix casts to integer types.
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Casting from signed to unsigned types and vice versa is legal in SV,
as is casting from a larger to a smaller size. Obey Verilog rules
for expression bit width and signedness.
2019-10-10 23:48:11 +01:00
1a40a6f902
Merge branch 'master' of github.com:steveicarus/iverilog
2019-10-09 09:02:57 -07:00
55efaf8769
Merge pull request #269 from nbrereton/features/nsb/check-case-handled
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Validate that value is handled for case priority qualifier.
2019-10-09 09:00:31 -07:00
a5ddf129a4
Merge pull request #273 from pkrc267/master
...
corrected a few typos for better readability
2019-10-09 08:44:45 -07:00
f795e2be18
corrected a few typos for better readability
2019-10-09 21:02:08 +05:30
54d7d26933
Merge branch 'master' of github.com:steveicarus/iverilog
2019-10-07 13:21:22 -07:00
0d29bd7c1c
Add a little note about Xcode bison not cutting it.
2019-10-07 13:21:16 -07:00
f2ca63a5a1
Disable debug output when debug_elaborate is not set.
2019-10-06 18:10:58 +01:00
68a6fa06a2
Improve old code for detecting missing explicit cast.
2019-10-06 18:03:37 +01:00
de54a58991
Fix issue #265 - emit a sensible error message when an explicit cast is needed.
2019-10-06 17:54:44 +01:00
06a60cac01
For SystemVerilog, support localparam in module parameter port lists.
2019-10-06 08:44:51 +01:00
414fafda2b
Check that value is handled for case priority and unique qualifiers.
2019-10-05 21:42:17 -04:00
cce30e89bb
Merge pull request #1 from steveicarus/master
...
update
2019-10-05 21:04:03 -04:00
763cc9c162
Merge branch 'master' of github.com:steveicarus/iverilog
2019-10-05 16:23:16 -07:00
befc91340c
Parse and elaborate unique and priority case statements
...
The unique, unique0, and priority keywords can decorate case statements
to tell the run time (or synthesis) to do extra tests (or make extra
assumptions). These tests are not implemented in the vvp run time, but
now the decorations make it to the code generators.
2019-10-05 16:23:04 -07:00
b1699a2781
Fix two compiler warnings
2019-10-05 15:29:08 -07:00
70da8db6b5
Fix assignment to scalar class property in tgt-vvp.
2019-10-05 20:12:52 +01:00
862010ac19
SV does not require constant expression in variable initialisation.
2019-10-05 20:11:38 +01:00
c86dc285cc
Fix for br1004 - fully support class construction in variable initialisation.
2019-10-05 20:10:11 +01:00
c9d849ed7b
Fix style in iverilog man page.
2019-10-05 13:41:50 +01:00
05641f386f
Add -g option to only enable supported assertion statements.
2019-10-05 13:37:03 +01:00
455702810e
Add support for parsing (and ignoring) the other unsupported SV assertions.
2019-10-05 08:55:11 +01:00
9167a236d8
Support import statements in packages and in the unit scope.
2019-10-03 19:44:44 +01:00
2ced291d33
Replace an assert with an internal error message.
2019-10-03 08:38:36 -07:00
4f48a7ed41
Fix assertion in error recovery.
2019-10-02 19:30:47 -07:00
ed75bc22ec
Fix incorrect loop termination test when searching for typedefs.
2019-10-03 00:32:09 +01:00
1147881176
Merge branch 'master' of github.com:steveicarus/iverilog
2019-10-02 09:34:36 -07:00
30fbc020e6
Don't allow nil bytes in string literals.
2019-10-02 09:34:18 -07:00
eeae2bfee9
Fix a syntax issue found while compiling with gcc 5.4
2019-10-01 18:58:28 -07:00
7cead04e6a
Merge branch 'master' of github.com:steveicarus/iverilog
2019-10-02 00:16:18 +01:00
5651adf73a
Handle breakage in nested module parsing.
2019-10-01 15:19:46 -07:00
9bb2147fb5
Merge branch 'package-imports-rework'
2019-10-01 23:04:23 +01:00
c62472f7ac
Merge branch 'master' of github.com:steveicarus/iverilog
2019-10-01 09:29:30 -07:00
Martin Whitaker
Cary R
Stephen Williams
Prakhar Yadav
Nick Brereton
nbrereton