Commit Graph

210 Commits

Author SHA1 Message Date
steve e2a37a8ccd Add support for module parameters. 1999-02-21 17:01:57 +00:00
steve e5f5f41515 Elaborate gate ranges. 1999-02-15 02:06:15 +00:00
steve fb439c78b9 Add the LineInfo class to carry the source file
location of things. PGate, Statement and PProcess.

 elaborate handles module parameter mismatches,
 missing or incorrect lvalues for procedural
 assignment, and errors are propogated to the
 top of the elaboration call tree.

 Attach line numbers to processes, gates and
 assignment statements.
1999-01-25 05:45:56 +00:00
steve 45f45f73b7 Support the include directive. 1998-12-09 04:02:47 +00:00
steve e097c999d5 Elaborate UDP devices,
Support UDP type attributes, and
 pass those attributes to nodes that
 are instantiated by elaboration,
 Put modules into a map instead of
 a simple list.
1998-12-01 00:42:13 +00:00
steve 91aad30e1f Parse UDP primitives all the way to pform. 1998-11-25 02:35:53 +00:00
steve af8d6fbf01 NetAssign handles lvalues as pin links
instead of a signal pointer,
 Wire attributes added,
 Ability to parse UDP descriptions added,
 XNF generates EXT records for signals with
 the PAD attribute.
1998-11-23 00:20:22 +00:00
steve d27f260bc1 Check net ranges in declarations. 1998-11-11 00:01:51 +00:00
steve b118634189 Handle procedural conditional, and some
of the conditional expressions.

 Elaborate signals and identifiers differently,
 allowing the netlist to hold signal information.
1998-11-07 17:05:05 +00:00
steve 3fb7a053be Introduce verilog to CVS. 1998-11-03 23:28:49 +00:00