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Fix for br1007 - out-of-range constant bit select should be a warning. 

An out-of-range constant bit select on the LHS of an assignment was being
treated as an error, whereas an out-of range constant part select would
only result in a warning. In any other context, either case would result
in a warning, so convert the error to a warning.

In addition, all warnings for out-of-range or undefined constant bit/part
selects should be controlled by -Wselect-range.

(cherry picked from commit b51e58fa9d)
This commit is contained in:
Martin Whitaker 2016-08-08 22:10:16 +01:00
parent cda95c1554
commit f9559853f1
1 changed files with 26 additions and 21 deletions
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31
elab_lval.cc
View File

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2000-2014 Stephen Williams (steve@icarus.com) * Copyright (c) 2000-2016 Stephen Williams (steve@icarus.com)
* Copyright CERN 2012-2013 / Stephen Williams (steve@icarus.com) * Copyright CERN 2012-2013 / Stephen Williams (steve@icarus.com)
* *
* This source code is free software; you can redistribute it * This source code is free software; you can redistribute it
@ -691,20 +691,24 @@ bool PEIdent::elaborate_lval_net_bit_(Design*des,
unsigned long lwid; unsigned long lwid;
bool rcl = reg->sb_to_slice(prefix_indices, lsb, loff, lwid); bool rcl = reg->sb_to_slice(prefix_indices, lsb, loff, lwid);
ivl_assert(*this, rcl); ivl_assert(*this, rcl);
cerr << get_fileline() << ": warning: L-value packed array " if (warn_ob_select) {
<< "select of " << reg->name(); cerr << get_fileline()
<< ": warning: L-value packed array select of "
<< reg->name();
if (reg->unpacked_dimensions() > 0) cerr << "[]"; if (reg->unpacked_dimensions() > 0) cerr << "[]";
cerr << " has an undefined index." << endl; cerr << " has an undefined index." << endl;
}
lv->set_part(new NetEConst(verinum(verinum::Vx)), lwid); lv->set_part(new NetEConst(verinum(verinum::Vx)), lwid);
return true; return true;
// The index is undefined and this is a bit select. // The index is undefined and this is a bit select.
} else { } else {
cerr << get_fileline() << ": warning: L-value bit select of " if (warn_ob_select) {
cerr << get_fileline()
<< ": warning: L-value bit select of "
<< reg->name(); << reg->name();
if (reg->unpacked_dimensions() > 0) cerr << "[]"; if (reg->unpacked_dimensions() > 0) cerr << "[]";
cerr << " has an undefined index." << endl; cerr << " has an undefined index." << endl;
}
lv->set_part(new NetEConst(verinum(verinum::Vx)), 1); lv->set_part(new NetEConst(verinum(verinum::Vx)), 1);
return true; return true;
} }
@ -801,12 +805,10 @@ bool PEIdent::elaborate_lval_net_bit_(Design*des,
// Constant bit select that does something useful. // Constant bit select that does something useful.
long loff = reg->sb_to_idx(prefix_indices,lsb); long loff = reg->sb_to_idx(prefix_indices,lsb);
if (loff < 0 || loff >= (long)reg->vector_width()) { if (warn_ob_select && (loff < 0 || loff >= (long)reg->vector_width())) {
cerr << get_fileline() << ": error: bit select " cerr << get_fileline() << ": warning: bit select "
<< reg->name() << "[" <<lsb<<"]" << reg->name() << "[" <<lsb<<"]"
<< " is out of range." << endl; << " is out of range." << endl;
des->errors += 1;
return 0;
} }
if (reg->type()==NetNet::UNRESOLVED_WIRE) { if (reg->type()==NetNet::UNRESOLVED_WIRE) {
@ -872,10 +874,13 @@ bool PEIdent::elaborate_lval_net_part_(Design*des,
ivl_assert(*this, reg); ivl_assert(*this, reg);
if (! parts_defined_flag) { if (! parts_defined_flag) {
cerr << get_fileline() << ": warning: L-value part select of " if (warn_ob_select) {
cerr << get_fileline()
<< ": warning: L-value part select of "
<< reg->name(); << reg->name();
if (reg->unpacked_dimensions() > 0) cerr << "[]"; if (reg->unpacked_dimensions() > 0) cerr << "[]";
cerr << " has an undefined index." << endl; cerr << " has an undefined index." << endl;
}
// Use a width of two here so we can distinguish between an // Use a width of two here so we can distinguish between an
// undefined bit or part select. // undefined bit or part select.
lv->set_part(new NetEConst(verinum(verinum::Vx)), 2); lv->set_part(new NetEConst(verinum(verinum::Vx)), 2);
@ -938,11 +943,11 @@ bool PEIdent::elaborate_lval_net_part_(Design*des,
} }
/* If the part select extends beyond the extremes of the /* If the part select extends beyond the extremes of the
variable, then report an error. Note that loff is variable, then output a warning. Note that loff is
converted to normalized form so is relative the converted to normalized form so is relative the
variable pins. */ variable pins. */
if (loff < 0 || moff >= (long)reg->vector_width()) { if (warn_ob_select && (loff < 0 || moff >= (long)reg->vector_width())) {
cerr << get_fileline() << ": warning: Part select " cerr << get_fileline() << ": warning: Part select "
<< reg->name() << "[" << msb<<":"<<lsb<<"]" << reg->name() << "[" << msb<<":"<<lsb<<"]"
<< " is out of range." << endl; << " is out of range." << endl;