diff --git a/elab_lval.cc b/elab_lval.cc
index 047d611ab..eec2aabd1 100644
--- a/elab_lval.cc
+++ b/elab_lval.cc
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2000-2014 Stephen Williams (steve@icarus.com)
+ * Copyright (c) 2000-2016 Stephen Williams (steve@icarus.com)
  * Copyright CERN 2012-2013 / Stephen Williams (steve@icarus.com)
  *
  *    This source code is free software; you can redistribute it
@@ -691,20 +691,24 @@ bool PEIdent::elaborate_lval_net_bit_(Design*des,
 		  unsigned long lwid;
 		  bool rcl = reg->sb_to_slice(prefix_indices, lsb, loff, lwid);
 		  ivl_assert(*this, rcl);
-		  cerr << get_fileline() << ": warning: L-value packed array "
-		       << "select of " << reg->name();
-		  if (reg->unpacked_dimensions() > 0) cerr << "[]";
-		  cerr << " has an undefined index." << endl;
-
+		  if (warn_ob_select) {
+			cerr << get_fileline()
+			     << ": warning: L-value packed array select of "
+			     << reg->name();
+			if (reg->unpacked_dimensions() > 0) cerr << "[]";
+			cerr << " has an undefined index." << endl;
+		  }
 		  lv->set_part(new NetEConst(verinum(verinum::Vx)), lwid);
 		  return true;
 	      // The index is undefined and this is a bit select.
 	    } else {
-		  cerr << get_fileline() << ": warning: L-value bit select of "
-		       << reg->name();
-		  if (reg->unpacked_dimensions() > 0) cerr << "[]";
-		  cerr << " has an undefined index." << endl;
-
+		  if (warn_ob_select) {
+			cerr << get_fileline()
+			     << ": warning: L-value bit select of "
+			     << reg->name();
+			if (reg->unpacked_dimensions() > 0) cerr << "[]";
+			cerr << " has an undefined index." << endl;
+		  }
 		  lv->set_part(new NetEConst(verinum(verinum::Vx)), 1);
 		  return true;
 	    }
@@ -801,12 +805,10 @@ bool PEIdent::elaborate_lval_net_bit_(Design*des,
 	      // Constant bit select that does something useful.
 	    long loff = reg->sb_to_idx(prefix_indices,lsb);
 
-	    if (loff < 0 || loff >= (long)reg->vector_width()) {
-		  cerr << get_fileline() << ": error: bit select "
+	    if (warn_ob_select && (loff < 0 || loff >= (long)reg->vector_width())) {
+		  cerr << get_fileline() << ": warning: bit select "
 		       << reg->name() << "[" <<lsb<<"]"
 		       << " is out of range." << endl;
-		  des->errors += 1;
-		  return 0;
 	    }
 
 	    if (reg->type()==NetNet::UNRESOLVED_WIRE) {
@@ -872,10 +874,13 @@ bool PEIdent::elaborate_lval_net_part_(Design*des,
       ivl_assert(*this, reg);
 
       if (! parts_defined_flag) {
-	    cerr << get_fileline() << ": warning: L-value part select of "
-	         << reg->name();
-	    if (reg->unpacked_dimensions() > 0) cerr << "[]";
-	    cerr << " has an undefined index." << endl;
+	    if (warn_ob_select) {
+		  cerr << get_fileline()
+		       << ": warning: L-value part select of "
+		       << reg->name();
+		  if (reg->unpacked_dimensions() > 0) cerr << "[]";
+		  cerr << " has an undefined index." << endl;
+	    }
 	      // Use a width of two here so we can distinguish between an
 	      // undefined bit or part select.
 	    lv->set_part(new NetEConst(verinum(verinum::Vx)), 2);
@@ -938,11 +943,11 @@ bool PEIdent::elaborate_lval_net_part_(Design*des,
       }
 
 	/* If the part select extends beyond the extremes of the
-	   variable, then report an error. Note that loff is
+	   variable, then output a warning. Note that loff is
 	   converted to normalized form so is relative the
 	   variable pins. */
 
-      if (loff < 0 || moff >= (long)reg->vector_width()) {
+      if (warn_ob_select && (loff < 0 || moff >= (long)reg->vector_width())) {
 	    cerr << get_fileline() << ": warning: Part select "
 		 << reg->name() << "[" << msb<<":"<<lsb<<"]"
 		 << " is out of range." << endl;