Add regression tests for module non-ANSI port declarations

Check that it is possible to define the data type of a non-ANSI module port
in a separate declaration from the port direction. Add tests for both the
type declared before the port direction and for the type declared after the
port direction.

Note that this doesn't work yet correctly for integer type module ports
yet, so there are no tests for this. This will be addressed in follow up
work.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>

ivtest/ivltests/module_nonansi_enum1.v

@@ -0,0 +1,21 @@
+// Check that it is possible to declare the data type for a enum type module
+// port separately from the direction for non-ANSI style port declarations.
+// declarations.
+
+typedef enum integer {
+  A, B
+} T;
+
+module test(x);
+  output x;
+  T x;
+
+  initial begin
+    if ($bits(x) == $bits(T)) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  end
+
+endmodule

ivtest/ivltests/module_nonansi_enum2.v

@@ -0,0 +1,20 @@
+// Check that it is possible to declare the data type for a enum type module
+// port before the direction for non-ANSI style port declarations.
+
+typedef enum integer {
+  A, B
+} T;
+
+module test(x);
+  T x;
+  output x;
+
+  initial begin
+    if ($bits(x) == $bits(T)) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  end
+
+endmodule

ivtest/ivltests/module_nonansi_parray1.v

@@ -0,0 +1,20 @@
+// Check that it is possible to declare the data type for a packed array module
+// port separately from the direction for non-ANSI style port declarations.
+// declarations.
+
+typedef logic [3:0] T1;
+typedef T1 [7:0] T2;
+
+module test(x);
+  output x;
+  T2 x;
+
+  initial begin
+    if ($bits(x) == $bits(T2)) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  end
+
+endmodule

ivtest/ivltests/module_nonansi_parray2.v

@@ -0,0 +1,19 @@
+// Check that it is possible to declare the data type for a packed array module
+// port before the direction for non-ANSI style port declarations.
+
+typedef logic [3:0] T1;
+typedef T1 [7:0] T2;
+
+module test(x);
+  T2 x;
+  output x;
+
+  initial begin
+    if ($bits(x) == $bits(T2)) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  end
+
+endmodule

ivtest/ivltests/module_nonansi_real1.v

@@ -0,0 +1,17 @@
+// Check that it is possible to declare the data type for a real type module
+// port separately from the direction for non-ANSI style port declarations.
+// declarations.
+
+module test(x);
+  output x;
+  real x;
+
+  initial begin
+    if (x == 0.0) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  end
+
+endmodule

ivtest/ivltests/module_nonansi_real2.v

@@ -0,0 +1,16 @@
+// Check that it is possible to declare the data type for a real type module
+// port before the direction for non-ANSI style port declarations.
+
+module test(x);
+  real x;
+  output x;
+
+  initial begin
+    if (x == 0.0) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  end
+
+endmodule

ivtest/ivltests/module_nonansi_struct1.v

@@ -0,0 +1,22 @@
+// Check that it is possible to declare the data type for a struct type module
+// port separately from the direction for non-ANSI style port declarations.
+// declarations.
+
+typedef struct packed {
+  reg [31:0] x;
+  reg [7:0] y;
+} T;
+
+module test(x);
+  output x;
+  T x;
+
+  initial begin
+    if ($bits(x) == $bits(T)) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  end
+
+endmodule

ivtest/ivltests/module_nonansi_struct2.v

@@ -0,0 +1,21 @@
+// Check that it is possible to declare the data type for a struct type module
+// port before the direction for non-ANSI style port declarations.
+
+typedef struct packed {
+  reg [31:0] x;
+  reg [7:0] y;
+} T;
+
+module test(x);
+  T x;
+  output x;
+
+  initial begin
+    if ($bits(x) == $bits(T)) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  end
+
+endmodule

ivtest/ivltests/module_nonansi_vec1.v

@@ -0,0 +1,17 @@
+// Check that it is possible to declare the data type for a vector type module
+// port separately from the direction for non-ANSI style port declarations.
+// declarations.
+
+module test(x);
+  output [7:0] x;
+  reg [7:0] x;
+
+  initial begin
+    if ($bits(x) == 8) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  end
+
+endmodule

ivtest/ivltests/module_nonansi_vec2.v

@@ -0,0 +1,16 @@
+// Check that it is possible to declare the data type for a vector type module
+// port before the direction for non-ANSI style port declarations.
+
+module test(x);
+  reg [7:0] x;
+  output [7:0] x;
+
+  initial begin
+    if ($bits(x) == 8) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  end
+
+endmodule

ivtest/regress-sv.list

@@ -312,6 +312,14 @@ localparam_type2	normal,-g2009		ivltests
 logical_short_circuit	normal,-g2012		ivltests
 logp2			normal,-g2005-sv	ivltests
 mod_inst_pkg		normal,-g2009		ivltests
+module_nonansi_enum1	normal,-g2005-sv	ivltests
+module_nonansi_enum2	normal,-g2005-sv	ivltests
+module_nonansi_parray1	normal,-g2005-sv	ivltests
+module_nonansi_parray2	normal,-g2005-sv	ivltests
+module_nonansi_real1	normal,-g2005-sv	ivltests
+module_nonansi_real2	normal,-g2005-sv	ivltests
+module_nonansi_struct1	normal,-g2005-sv	ivltests
+module_nonansi_struct2	normal,-g2005-sv	ivltests
 module_output_port_sv_var1 normal,-g2005-sv	ivltests
 module_output_port_sv_var2 normal,-g2005-sv	ivltests
 named_begin		normal,-g2009		ivltests

ivtest/regress-vlg.list

@@ -647,6 +647,8 @@ module3.12A		normal			ivltests main
 module3.12B		normal			ivltests
 module_inout_port_type	CE			ivltests
 module_input_port_type	CE			ivltests
+module_nonansi_vec1	normal			ivltests
+module_nonansi_vec2	normal			ivltests
 module_output_port_var1	normal			ivltests
 module_output_port_var2	normal			ivltests
 module_port_range_mismatch CE			ivltests