Merge pull request #1387 from flaviens/patch-2
Preserve sign of negative zero
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commit
e31c441dbe
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@ -0,0 +1,35 @@
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// Check that the vvp code generator preserves the sign of a negative zero
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// real constant. The sign used to be detected with (value < 0), which is
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// false for IEEE 754 -0.0, so a -0.0 constant was emitted as +0.0 and the
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// compiled value no longer matched the runtime real value.
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module test;
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real nz;
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real pz;
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initial begin
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nz = -0.0;
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pz = 0.0;
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// The sign bit is the only thing that tells -0.0 from +0.0.
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if ($realtobits(nz) !== 64'h8000_0000_0000_0000) begin
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$display("FAILED: -0.0 stored as %h", $realtobits(nz));
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$finish;
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end
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if ($realtobits(pz) !== 64'h0000_0000_0000_0000) begin
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$display("FAILED: 0.0 stored as %h", $realtobits(pz));
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$finish;
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end
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// The reciprocal makes the sign observable: 1.0/-0.0 is -inf.
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if (1.0 / nz >= 0.0) begin
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$display("FAILED: 1.0/-0.0 = %g", 1.0 / nz);
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$finish;
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end
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$display("PASSED");
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end
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endmodule
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@ -213,6 +213,7 @@ pv_wr_fn_vec2 vvp_tests/pv_wr_fn_vec2.json
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pv_wr_fn_vec4 vvp_tests/pv_wr_fn_vec4.json
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queue_fail vvp_tests/queue_fail.json
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readmem-invalid vvp_tests/readmem-invalid.json
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real_negative_zero vvp_tests/real_negative_zero.json
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scaled_real vvp_tests/scaled_real.json
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scan-invalid vvp_tests/scan-invalid.json
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sdf_interconnect1 vvp_tests/sdf_interconnect1.json
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@ -0,0 +1,4 @@
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{
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"type" : "normal",
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"source" : "real_negative_zero.v"
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}
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@ -202,9 +202,9 @@ static void draw_realnum_real(ivl_expr_t expr)
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return;
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}
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if (value < 0) {
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if (signbit(value)) {
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sign = 0x4000;
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value *= -1;
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value = -value;
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}
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fract = frexp(value, &expo);
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