Add regression test for negative zero sign preservation

Check that the vvp code generator emits a -0.0 real constant with its
sign bit set, so the compiled value matches the runtime real value. The
sign used to be detected with (value < 0), which is false for IEEE 754
-0.0, and a -0.0 constant was turned into +0.0.

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>

ivtest/ivltests/real_negative_zero.v

@@ -0,0 +1,35 @@
+// Check that the vvp code generator preserves the sign of a negative zero
+// real constant. The sign used to be detected with (value < 0), which is
+// false for IEEE 754 -0.0, so a -0.0 constant was emitted as +0.0 and the
+// compiled value no longer matched the runtime real value.
+
+module test;
+
+  real nz;
+  real pz;
+
+  initial begin
+    nz = -0.0;
+    pz = 0.0;
+
+    // The sign bit is the only thing that tells -0.0 from +0.0.
+    if ($realtobits(nz) !== 64'h8000_0000_0000_0000) begin
+      $display("FAILED: -0.0 stored as %h", $realtobits(nz));
+      $finish;
+    end
+
+    if ($realtobits(pz) !== 64'h0000_0000_0000_0000) begin
+      $display("FAILED: 0.0 stored as %h", $realtobits(pz));
+      $finish;
+    end
+
+    // The reciprocal makes the sign observable: 1.0/-0.0 is -inf.
+    if (1.0 / nz >= 0.0) begin
+      $display("FAILED: 1.0/-0.0 = %g", 1.0 / nz);
+      $finish;
+    end
+
+    $display("PASSED");
+  end
+
+endmodule

ivtest/regress-vvp.list

@@ -207,6 +207,7 @@ pv_wr_fn_vec2			vvp_tests/pv_wr_fn_vec2.json
 pv_wr_fn_vec4			vvp_tests/pv_wr_fn_vec4.json
 queue_fail			vvp_tests/queue_fail.json
 readmem-invalid			vvp_tests/readmem-invalid.json
+real_negative_zero		vvp_tests/real_negative_zero.json
 scaled_real			vvp_tests/scaled_real.json
 scan-invalid			vvp_tests/scan-invalid.json
 sdf_interconnect1		vvp_tests/sdf_interconnect1.json

ivtest/vvp_tests/real_negative_zero.json

@@ -0,0 +1,4 @@
+{
+    "type"   : "normal",
+    "source" : "real_negative_zero.v"
+}