Add regression tests for task non-ANSI port declarations

Check that it is possible to define the data type of a non-ANSI task port
in a separate declaration from the port direction. Add tests for both the
type declared before the port direction and for the type declared after the
port direction.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>

ivtest/ivltests/task_nonansi_enum1.v

@@ -0,0 +1,22 @@
+// Check that it is possible to declare the data type for an enum type task port
+// separately from the direction for non-ANSI style port declarations.
+
+module test;
+
+  typedef enum integer {
+    A, B
+  } T;
+
+  task t;
+    input x;
+    T x;
+    if (x == B && $bits(x) == $bits(T)) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  endtask
+
+  initial t(B);
+
+endmodule

ivtest/ivltests/task_nonansi_enum2.v

@@ -0,0 +1,22 @@
+// Check that it is possible to declare the data type for an enum type task port
+// before the direction for non-ANSI style port declarations.
+
+module test;
+
+  typedef enum integer {
+    A, B
+  } T;
+
+  task t;
+    T x;
+    input x;
+    if (x == B && $bits(x) == $bits(T)) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  endtask
+
+  initial t(B);
+
+endmodule

ivtest/ivltests/task_nonansi_int1.v

@@ -0,0 +1,18 @@
+// Check that it is possible to declare the data type for an atom2 type task
+// port separately from the direction for non-ANSI style port declarations.
+
+module test;
+
+  task t;
+    input x;
+    int x;
+    if (x == 10 && $bits(x) == $bits(int)) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  endtask
+
+  initial t(10);
+
+endmodule

ivtest/ivltests/task_nonansi_int2.v

@@ -0,0 +1,18 @@
+// Check that it is possible to declare the data type for an atom2 type task
+// port before the direction for non-ANSI style port declarations.
+
+module test;
+
+  task t;
+    int x;
+    input x;
+    if (x == 10 && $bits(x) == $bits(int)) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  endtask
+
+  initial t(10);
+
+endmodule

ivtest/ivltests/task_nonansi_integer1.v

@@ -0,0 +1,18 @@
+// Check that it is possible to declare the data type for an integer type task
+// port separately from the direction for non-ANSI style port declarations.
+
+module test;
+
+  task t;
+    input x;
+    integer x;
+    if (x == 10 && $bits(x) == $bits(integer)) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  endtask
+
+  initial t(10);
+
+endmodule

ivtest/ivltests/task_nonansi_integer2.v

@@ -0,0 +1,18 @@
+// Check that it is possible to declare the data type for an integer type task
+// port before the direction for non-ANSI style port declarations.
+
+module test;
+
+  task t;
+    integer x;
+    input x;
+    if (x == 10 && $bits(x) == $bits(integer)) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  endtask
+
+  initial t(10);
+
+endmodule

ivtest/ivltests/task_nonansi_parray1.v

@@ -0,0 +1,29 @@
+// Check that it is possible to declare the data type for a packed array type
+// task port separately from the direction for non-ANSI style port declarations.
+
+module test;
+
+  typedef logic [7:0] T1;
+  typedef T1 [3:0] T2;
+
+  task t;
+    input x;
+    T2 x;
+    if (x[0] == 1 && x[1] == 2 && x[2] == 3 && x[3] == 4 &&
+        $bits(x) == $bits(T2)) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  endtask
+
+  initial begin
+    static T2 val;
+    val[0] = 8'h1;
+    val[1] = 8'h2;
+    val[2] = 8'h3;
+    val[3] = 8'h4;
+    t(val);
+  end
+
+endmodule

ivtest/ivltests/task_nonansi_parray2.v

@@ -0,0 +1,29 @@
+// Check that it is possible to declare the data type for a packed array type
+// task port before the direction for non-ANSI style port declarations.
+
+module test;
+
+  typedef logic [7:0] T1;
+  typedef T1 [3:0] T2;
+
+  task t;
+    T2 x;
+    input x;
+    if (x[0] == 1 && x[1] == 2 && x[2] == 3 && x[3] == 4 &&
+        $bits(x) == $bits(T2)) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  endtask
+
+  initial begin
+    static T2 val;
+    val[0] = 8'h1;
+    val[1] = 8'h2;
+    val[2] = 8'h3;
+    val[3] = 8'h4;
+    t(val);
+  end
+
+endmodule

ivtest/ivltests/task_nonansi_real1.v

@@ -0,0 +1,18 @@
+// Check that it is possible to declare the data type for a real type task port
+// separately from the direction for non-ANSI style port declarations.
+
+module test;
+
+  task t;
+    input x;
+    real x;
+    if (x == 1.23) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  endtask
+
+  initial t(1.23);
+
+endmodule

ivtest/ivltests/task_nonansi_real2.v

@@ -0,0 +1,18 @@
+// Check that it is possible to declare the data type for a real type task port
+// before the direction for non-ANSI style port declarations.
+
+module test;
+
+  task t;
+    real x;
+    input x;
+    if (x == 1.23) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  endtask
+
+  initial t(1.23);
+
+endmodule

ivtest/ivltests/task_nonansi_string1.v

@@ -0,0 +1,18 @@
+// Check that it is possible to declare the data type for a string type task
+// port separately from the direction for non-ANSI style port declarations.
+
+module test;
+
+  task t;
+    input x;
+    string x;
+    if (x == "TEST") begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  endtask
+
+  initial t("TEST");
+
+endmodule

ivtest/ivltests/task_nonansi_string2.v

@@ -0,0 +1,18 @@
+// Check that it is possible to declare the data type for a string type task
+// port before the direction for non-ANSI style port declarations.
+
+module test;
+
+  task t;
+    string x;
+    input x;
+    if (x == "TEST") begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  endtask
+
+  initial t("TEST");
+
+endmodule

ivtest/ivltests/task_nonansi_struct1.v

@@ -0,0 +1,28 @@
+// Check that it is possible to declare the data type for a struct type task
+// port separately from the direction for non-ANSI style port declarations.
+
+module test;
+
+  typedef struct packed {
+    reg [31:0] x;
+    reg [7:0] y;
+  } T;
+
+  task t;
+    input x;
+    T x;
+    if (x.x == 10 && x.y == 20 && $bits(x) == $bits(T)) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  endtask
+
+  initial begin
+    static T val;
+    val.x = 10;
+    val.y = 20;
+    t(val);
+  end
+
+endmodule

ivtest/ivltests/task_nonansi_struct2.v

@@ -0,0 +1,28 @@
+// Check that it is possible to declare the data type for a struct type task
+// port before the direction for non-ANSI style port declarations.
+
+module test;
+
+  typedef struct packed {
+    reg [31:0] x;
+    reg [7:0] y;
+  } T;
+
+  task t;
+    input x;
+    T x;
+    if (x.x == 10 && x.y == 20 && $bits(x) == $bits(T)) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  endtask
+
+  initial begin
+    static T val;
+    val.x = 10;
+    val.y = 20;
+    t(val);
+  end
+
+endmodule

ivtest/ivltests/task_nonansi_time1.v

@@ -0,0 +1,18 @@
+// Check that it is possible to declare the data type for a time type task port
+// separately from the direction for non-ANSI style port declarations.
+
+module test;
+
+  task t;
+    input x;
+    time x;
+    if (x == 10 && $bits(x) == $bits(time)) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  endtask
+
+  initial t(10);
+
+endmodule

ivtest/ivltests/task_nonansi_time2.v

@@ -0,0 +1,18 @@
+// Check that it is possible to declare the data type for a time type task port
+// before the direction for non-ANSI style port declarations.
+
+module test;
+
+  task t;
+    time x;
+    input x;
+    if (x == 10 && $bits(x) == $bits(time)) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  endtask
+
+  initial t(10);
+
+endmodule

ivtest/ivltests/task_nonansi_vec1.v

@@ -0,0 +1,18 @@
+// Check that it is possible to declare the data type for a vector type task
+// port separately from the direction for non-ANSI style port declarations.
+
+module test;
+
+  task t;
+    input [7:0] x;
+    reg [7:0] x;
+    if (x == 10 && $bits(x) == 8) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  endtask
+
+  initial t(10);
+
+endmodule

ivtest/ivltests/task_nonansi_vec2.v

@@ -0,0 +1,18 @@
+// Check that it is possible to declare the data type for a vector type task
+// port before the direction for non-ANSI style port declarations.
+
+module test;
+
+  task t;
+    reg [7:0] x;
+    input [7:0] x;
+    if (x == 10 && $bits(x) == 8) begin
+      $display("PASSED");
+    end else begin
+      $display("FAILED");
+    end
+  endtask
+
+  initial t(10);
+
+endmodule

ivtest/regress-sv.list

@@ -604,6 +604,14 @@ task_init_assign	normal,-g2009		ivltests
 task_init_var1		normal,-g2009		ivltests
 task_init_var2		normal,-g2009		ivltests
 task_init_var3		normal,-g2009		ivltests
+task_nonansi_enum1	normal,-g2005-sv	ivltests
+task_nonansi_enum2	normal,-g2005-sv	ivltests
+task_nonansi_int1	normal,-g2005-sv	ivltests
+task_nonansi_int2	normal,-g2005-sv	ivltests
+task_nonansi_parray1	normal,-g2005-sv	ivltests
+task_nonansi_parray2	normal,-g2005-sv	ivltests
+task_nonansi_struct1	normal,-g2005-sv	ivltests
+task_nonansi_struct2	normal,-g2005-sv	ivltests
 task_port_types1	normal,-g2009		ivltests
 task_port_types2	normal,-g2009		ivltests
 task_scope2		normal,-g2009		ivltests

ivtest/regress-vlg.list

@@ -1609,6 +1609,14 @@ task_inpad		normal			ivltests # Validates input of task should pad w/ 0
 task_iotypes		normal			ivltests # task ports with types.
 task_iotypes2		normal			ivltests # task ports with types.
 task_mem		normal			ivltests
+task_nonansi_integer1	normal			ivltests
+task_nonansi_integer2	normal			ivltests
+task_nonansi_real1	normal			ivltests
+task_nonansi_real2	normal			ivltests
+task_nonansi_time1	normal			ivltests
+task_nonansi_time2	normal			ivltests
+task_nonansi_vec1	normal			ivltests
+task_nonansi_vec2	normal			ivltests
 task_noop		normal			ivltests # Task with no contents.
 task_noop2		CO			ivltests # Task *really* with no contents.
 task_omemw2		normal			ivltests

ivtest/regress-vlog95.list

@@ -95,6 +95,8 @@ recursive_task		CE			ivltests
 task_init_var1		CE,-pallowsigned=1	ivltests
 task_init_var2		CE,-pallowsigned=1	ivltests
 task_init_var3		CE,-pallowsigned=1	ivltests
+task_nonansi_int1	normal,-g2005-sv,-pallowsigned=1	ivltests
+task_nonansi_int2	normal,-g2005-sv,-pallowsigned=1	ivltests
 task_port_types1	CE,-pallowsigned=1	ivltests
 task_port_types2	CE,-pallowsigned=1	ivltests
 test_work14		CE			ivltests