From ba8688c0d1ff6d6779c4dc2948e6a09c2956012d Mon Sep 17 00:00:00 2001 From: Nick Gasson Date: Sun, 18 Jan 2009 21:54:00 +0000 Subject: [PATCH] Fix regression of always3.1.8A with VHDL target The patch for pr2516774 exposed a bug which caused always3.1.8A to fail. This patch corrects that. The test to decide when to use a sensitivity list rather than an explicit wait statement wasn't tight enough. --- tgt-vhdl/stmt.cc | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/tgt-vhdl/stmt.cc b/tgt-vhdl/stmt.cc index 3f4ae30bd..1eda5e98b 100644 --- a/tgt-vhdl/stmt.cc +++ b/tgt-vhdl/stmt.cc @@ -719,7 +719,8 @@ static int draw_wait(vhdl_procedural *_proc, stmt_container *container, // If this container is the top-level statement (i.e. it is the // first thing inside a process) then we can extract these // events out into the sensitivity list - bool is_top_level = proc->get_container()->empty(); + bool is_top_level = container == proc->get_container() + && container->empty(); // See if this can be implemented in a more idomatic way before we // fall back on the generic translation