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Document the MUXZ functor.

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steve 2005-11-10 13:25:31 +00:00
parent c87223170b
commit 8d49abf967
1 changed files with 9 additions and 1 deletions
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vvp/README.txt
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@ -1,7 +1,7 @@
/* /*
* Copyright (c) 2001 Stephen Williams (steve@icarus.com) * Copyright (c) 2001 Stephen Williams (steve@icarus.com)
* *
* $Id: README.txt,v 1.72 2005/10/12 17:23:15 steve Exp $ * $Id: README.txt,v 1.73 2005/11/10 13:25:31 steve Exp $
*/ */
VVP SIMULATION ENGINE VVP SIMULATION ENGINE
@ -150,6 +150,14 @@ Almost all of the structural aspects of a simulation can be
represented by functors, which perform the very basic task of represented by functors, which perform the very basic task of
combining up to four inputs down to one output. combining up to four inputs down to one output.
- MUXZ
Q | A B S n/a
--+-------------
A | * * 0
B | * * 1
DFF STATEMENTS: DFF STATEMENTS:
The Verilog language itself does not have a DFF primitive, but post The Verilog language itself does not have a DFF primitive, but post