vpi_get_value of integer values replaces x/z bits with 0.

In arithmetic expressions, vectors with x/z are replaced with 0,
but vpi_get_value replaces x/z bits with 0 bits without replacing
the whole vector.
This commit is contained in:
Stephen Williams 2008-06-25 13:59:39 -07:00
parent 3ec8a867db
commit 8c54803094
3 changed files with 17 additions and 6 deletions

View File

@ -298,8 +298,7 @@ static void format_vpiIntVal(vvp_fun_signal_vec*sig, int base, unsigned wid,
{ {
vvp_vector4_t sub = sig->vec4_value().subvalue(base, wid); vvp_vector4_t sub = sig->vec4_value().subvalue(base, wid);
long val = 0; long val = 0;
bool flag = vector4_to_value(sub, val, signed_flag); bool flag = vector4_to_value(sub, val, signed_flag, false);
if (! flag) val = 0;
vp->value.integer = val; vp->value.integer = val;
} }

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@ -1133,10 +1133,12 @@ ostream& operator<< (ostream&out, const vvp_vector4_t&that)
return out; return out;
} }
bool vector4_to_value(const vvp_vector4_t&vec, long&val, bool is_signed) bool vector4_to_value(const vvp_vector4_t&vec, long&val,
bool is_signed, bool is_arithmetic)
{ {
long res = 0; long res = 0;
long msk = 1; long msk = 1;
bool rc_flag = true;
for (unsigned idx = 0 ; idx < vec.size() ; idx += 1) { for (unsigned idx = 0 ; idx < vec.size() ; idx += 1) {
switch (vec.value(idx)) { switch (vec.value(idx)) {
@ -1146,7 +1148,10 @@ bool vector4_to_value(const vvp_vector4_t&vec, long&val, bool is_signed)
res |= msk; res |= msk;
break; break;
default: default:
return false; if (is_arithmetic)
return false;
else
rc_flag = false;
} }
msk <<= 1L; msk <<= 1L;
@ -1158,7 +1163,7 @@ bool vector4_to_value(const vvp_vector4_t&vec, long&val, bool is_signed)
} }
val = res; val = res;
return true; return rc_flag;
} }
bool vector4_to_value(const vvp_vector4_t&vec, unsigned long&val) bool vector4_to_value(const vvp_vector4_t&vec, unsigned long&val)

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@ -381,8 +381,15 @@ template <class T> extern T coerce_to_width(const T&that, unsigned width);
* place (this follows the rules of Verilog conversions from vector4 * place (this follows the rules of Verilog conversions from vector4
* to real and integers) and the return value becomes false to * to real and integers) and the return value becomes false to
* indicate an error. * indicate an error.
*
* The "is_arithmetic" flag true will cause a result to be entirely 0
* if any bits are X/Z. That is normally what you want if this value
* is in the midst of an arithmetic expression. If is_arithmetic=false
* then the X/Z bits will be replaced with 0 bits, and the return
* value will be "false", but the other bits will be transferred. This
* is what you want if you are doing "vpi_get_value", for example.
*/ */
extern bool vector4_to_value(const vvp_vector4_t&a, long&val, bool is_signed); extern bool vector4_to_value(const vvp_vector4_t&a, long&val, bool is_signed, bool is_arithmetic =true);
extern bool vector4_to_value(const vvp_vector4_t&a, unsigned long&val); extern bool vector4_to_value(const vvp_vector4_t&a, unsigned long&val);
extern bool vector4_to_value(const vvp_vector4_t&a, double&val, bool is_signed); extern bool vector4_to_value(const vvp_vector4_t&a, double&val, bool is_signed);