From 8c5480309446e74f776e5a0d981d69e84e6f50cb Mon Sep 17 00:00:00 2001 From: Stephen Williams Date: Wed, 25 Jun 2008 13:59:39 -0700 Subject: [PATCH] vpi_get_value of integer values replaces x/z bits with 0. In arithmetic expressions, vectors with x/z are replaced with 0, but vpi_get_value replaces x/z bits with 0 bits without replacing the whole vector. --- vvp/vpi_signal.cc | 3 +-- vvp/vvp_net.cc | 11 ++++++++--- vvp/vvp_net.h | 9 ++++++++- 3 files changed, 17 insertions(+), 6 deletions(-) diff --git a/vvp/vpi_signal.cc b/vvp/vpi_signal.cc index 54ef5dd47..c3bdf03e9 100644 --- a/vvp/vpi_signal.cc +++ b/vvp/vpi_signal.cc @@ -298,8 +298,7 @@ static void format_vpiIntVal(vvp_fun_signal_vec*sig, int base, unsigned wid, { vvp_vector4_t sub = sig->vec4_value().subvalue(base, wid); long val = 0; - bool flag = vector4_to_value(sub, val, signed_flag); - if (! flag) val = 0; + bool flag = vector4_to_value(sub, val, signed_flag, false); vp->value.integer = val; } diff --git a/vvp/vvp_net.cc b/vvp/vvp_net.cc index b9d6b60be..eb5f154b4 100644 --- a/vvp/vvp_net.cc +++ b/vvp/vvp_net.cc @@ -1133,10 +1133,12 @@ ostream& operator<< (ostream&out, const vvp_vector4_t&that) return out; } -bool vector4_to_value(const vvp_vector4_t&vec, long&val, bool is_signed) +bool vector4_to_value(const vvp_vector4_t&vec, long&val, + bool is_signed, bool is_arithmetic) { long res = 0; long msk = 1; + bool rc_flag = true; for (unsigned idx = 0 ; idx < vec.size() ; idx += 1) { switch (vec.value(idx)) { @@ -1146,7 +1148,10 @@ bool vector4_to_value(const vvp_vector4_t&vec, long&val, bool is_signed) res |= msk; break; default: - return false; + if (is_arithmetic) + return false; + else + rc_flag = false; } msk <<= 1L; @@ -1158,7 +1163,7 @@ bool vector4_to_value(const vvp_vector4_t&vec, long&val, bool is_signed) } val = res; - return true; + return rc_flag; } bool vector4_to_value(const vvp_vector4_t&vec, unsigned long&val) diff --git a/vvp/vvp_net.h b/vvp/vvp_net.h index 832689e72..2d352c4e3 100644 --- a/vvp/vvp_net.h +++ b/vvp/vvp_net.h @@ -381,8 +381,15 @@ template extern T coerce_to_width(const T&that, unsigned width); * place (this follows the rules of Verilog conversions from vector4 * to real and integers) and the return value becomes false to * indicate an error. + * + * The "is_arithmetic" flag true will cause a result to be entirely 0 + * if any bits are X/Z. That is normally what you want if this value + * is in the midst of an arithmetic expression. If is_arithmetic=false + * then the X/Z bits will be replaced with 0 bits, and the return + * value will be "false", but the other bits will be transferred. This + * is what you want if you are doing "vpi_get_value", for example. */ -extern bool vector4_to_value(const vvp_vector4_t&a, long&val, bool is_signed); +extern bool vector4_to_value(const vvp_vector4_t&a, long&val, bool is_signed, bool is_arithmetic =true); extern bool vector4_to_value(const vvp_vector4_t&a, unsigned long&val); extern bool vector4_to_value(const vvp_vector4_t&a, double&val, bool is_signed);